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Browse Wireline Communication IP
ATM / Utopia (4)
CEI (14)
Cell / Packet (6)
Error Correction/Detection (145)
Ethernet (131)
Fibre Channel (1)
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Interleaver/Deinterleaver (1)
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Optical/Telecom (50)
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CEI-112G-MR/LR (8)
CEI-112G-VSR (4)
CEI-56G-MR/LR (1)
CEI-6G-SR/LR (1)
Concatenated (9)
Forward Error Correction (69)
LDPC (20)
Reed-Solomon (18)
Turbocode (6)
Viterbi (7)
Other (16)
Fibre Channel 16G (1)
Quadrature Amplitude Modulation (2)
Other (15)
EPON (1)
OTN (28)
PDH (3)
SONET / SDH (6)
SPI (12)
413 IP
201
3.0
100 Gbit/s IEEE 802.3bj RS Encoder and Decoder
IEEE 802.3bj was developed in response to the rapid growth of server, network and internet traffic. The standard meets the need for higher data rates ...
202
3.0
2.3 Gbit/s DOCSIS 3.1 Downstream LDPC Decoder (PLC, NCP, Data)
Data Over Cable Service Interface Specification (DOCSIS) is an international telecommunications standard that permits the addition of high-bandwidth d...
203
3.0
Wideband DDC
The Creonic Wideband Digital Down Converter (DDC) digitally converts the input signal at IF frequency down to baseband by multiplying input samples wi...
204
3.0
DVB-RCS2 Modulator
The Creonic DVB-RCS2 modulator is a low-complexity high-performance solution that allows for symbol rates of up to 160 MSymb/s on state-of-the-art FPG...
205
3.0
Generic Polar FEC Codec
Creonic has flexible Polar decoder architecture to fulfil different customer requirements. The IP core has been demonstrated on internal conferences...
206
3.0
Fixed-Point AWGN Channel
The Creonic AWGN Channel IP is a noise generator capable of processing up to a maximum of 512 symbols in parallel. The IP was developed with the aim o...
207
3.0
10/100/1000 base T ethernet Phy
...
208
3.0
DVB-S2 BCH and LDPC Encoder and Decoder
DVB-S2 (Digital Video Broadcast - Satellite 2nd Generation) is an ETSI standard of the second generation for digital data transmission via satellites....
209
3.0
10/100 Mb Media Access Controller with RMII
Our innovative solution is a hardware implementation of media access control protocol defined by the IEEE standard. The DMAC-RMII in cooperation with ...
210
3.0
1Gbit/s LDPC Decoder and Encoder (WiMedia UWB)
The solution from Creonic for data rates of up to 1 Gbit/s offers outstanding efficiency in terms of implementation complexity. John Porter, CTO of Ca...
211
3.0
GMR Release 2 and GMR Release 3 LDPC Decoder
GEO-Mobile Radio (GMR) is an ETSI standard for satellite phones. The Creonic GMR Decoder IP core supports the PNB2 burst packets that were added in GM...
212
3.0
IEEE 802.15.3c (60 GHz PHY) Multi-Gbit/s LDPC Decoder
The IEEE 802.15 working group specifies standards targeting the wireless personal area network (WPAN). Task group 3 of the working group focuses on hi...
213
3.0
DVB-C2 Receiver (including LDPC and BCH decoder)
DVB-C2 (Digital Video Broadcast - Cable 2nd Generation) is an ETSI standard of the second generation for digital data transmission via cable networks....
214
3.0
Open Source Viterbi Decoder (AXI4-Stream compliant)
Convolutional codes are widely adopted in wireless communication systems for forward error correction. Creonic offers you an open source Viterbi decod...
215
3.0
19 GHz to 20.25 GHz FMCW Modulator for RADAR
The WEA20SFMCWI22G is an ultra-linear FMCW modulator consisting of 3 integrated PLLs. One PLL provides a high frequency Reference signal and the other...
216
3.0
IEEE 802.11ad (WiGig) LDPC Decoder
The WiGig standard (IEEE 802.11ad) delivers data rates of up to 7 Gbit/s and hence outperforms the current IEEE 802.11n standard by more than 10x. It ...
217
3.0
66/2112 Codec for Cyclic Code (2112,2080)
The CEC1-66/2112 core implements the codec for the Forward Error Correction (FEC) cyclic code (2112,2080) used in the IEEE 802.3ap (10G Backplane Ethe...
218
3.0
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...
219
3.0
100G Reed-Solomon Codec for Ethernet IEEE 802.3 Clause 91 (803.3bj)
The RS100-160 core implements the codec for the Forward Error Correction (FEC) cyclic code RS(528, 514, 7,10) used in the IEEE 802.3bj (100G Backplane...
220
2.0
DVB-RCS Turbo Decoder
DVB-RCS (Digital Video Broadcasting - Interaction channel for satellite distribution systems) is an established ETSI standard for digital data transmi...
221
2.0
CCSDS LDPC Encoder and Decoder
The CCSDS LDPC codec supports code rate 223/255 with coded block size of 8160 bits, which allows for a simple replacement of legacy Reed-Solomon decod...
222
2.0
4G LTE/LTE-A Turbo Decoder
LTE and LTE Advanced (LTE-A) are the mobile broadband standards of the 4th generation. Current LTE installtion provides data rates of up to 300 Mbit/s...
223
2.0
CCSDS AR4JA LDPC Encoder & Decoder
The Creonic CCSDS AR4JA LDPC IP supports the LDPC coding schemes as defined by the CCSDS standard. The LDPC codes with rates 1/2, 2/3 and 4/5, block l...
224
2.0
DVB-GSE Encapsulator and Decapsulator
The DVB-GSE encapsulator and decapsulator IP cores close the gap between network protocols like Ethernet and the physical layer of the DVB family of s...
225
2.0
Binary-FSK Demodulator
16-bit BFSK demodulator with complex or real data samples. Suitable for passband or baseband operation. Ideal for use in low cost / low power RF appl...
226
2.0
Binary-PSK Demodulator
16-bit BPSK demodulator ideal for low-cost radio links over a few 100m. Features automatic carrier lock with no complex PLL setup or tuning required. ...
227
2.0
LDPC Decoder for IS-GPS-800D Applications
The IS-GPS-800D standard defines an irregular Parity Check Matrix (PCM) for 2 subframes (2 and 3) encoded using Low Density Parity Check (LDPC) Forwar...
228
2.0
LDPC Decoder for DVB-C2
...
229
2.0
LTE Turbo decoder
This block is suitable for 3GPP Long Term Evolution (LTE) applications compatible with the 3GPP Technical Specification. The LTE Release-8 Turbo code ...
230
2.0
56G SerDes Ethernet
56G SerDes IP core supports PAM4 signaling in the range of 25.0-60.0 Gbps using full-rate and half-rate modes with scrambled data. Non-return-to-zero ...
231
2.0
SDA OCT V3.0 Encoder and Decoder
The Optical Communications Terminal (OCT) Standard was developed by the Space Development Agency (SDA) with the purpose of bringing interoperability a...
232
2.0
UltraFast BCH Decoder
BCH codes are widely used where bit errors are scattered randomly within the codeword. The Creonic Ultra-fast BCH Decoder is capable of processing an ...
233
2.0
ITU 25G PON LDPC Encoder and Decoder
The ITU-T G.9804.2 Recommendation defines the common transmission convergence (ComTC) layer for Higher Speed Passive Optical Networks. As part of the ...
234
2.0
MAC Privacy Protection IP
The MAC Privacy Protection IP is a fully compliant solution that provides Ethernet Layer 2 Security for port and data privacy as standardized in IEEE ...
235
2.0
DVB-RCS2 Turbo Decoder
DVB-RCS2 (Digital Video Broadcast - Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second generation for digit...
236
2.0
Reed-Solomon Memory Protection Codec
The Reed-Solomon IP core provide an alternative to traditional Hamming codecs for memory protection - Error Detection And Correction (EDAC) - function...
237
2.0
Serial protocol Interface Slave
The MSPIS IP implements a synchronous a single-chip SPI Slave IP capable of high speed serial data transfer with one SPI master. The MSPIS IP can be ...
238
2.0
Enhanced Services Controller - Performance Monitoring
The MESC_PM3X function, implemented on a Spartan II FPGA, is to extend the functionnality already available within the APC. This macro can be custo...
239
2.0
Enhanced Services Controller - Statistics Controller
The MESC_ST-5A function, implemented on a Cyclone II FPGA, is to extend the functionnality already available within the APC. This macro can be cust...
240
2.0
Enhanced Services Controller - Statistics & Performance
...
241
2.0
Enhanced Services Controller - Statistics Monitor
The MESC_ST3X function, implemented on a Virtex II FPGA, is to extend the functionnality already available within the APC. This macro can be custom...
242
2.0
SPI Master - EEPROM Controller
The MSPIM IP implements a synchronous a single-chip SPI Master IP capable of high speed serial data transfer with up to 8 SPI slave. The MSPIM IP can...
243
2.0
Reed Solomon Encoder/Decoder
- The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the input message in order ...
244
2.0
BCH Encoder/Decoder
...
245
2.0
LDPC Decoder for DVB-T2/T2-Lite
...
246
2.0
Viterbi Decoder
Convolutional FEC codes are very popular because of their powerful error correction capability and are especially suited for correcting random errors...
247
2.0
CCSDS LDPC
...
248
2.0
Ethernet MAC 10G SFP
The ETH_MAC_10G_SFP IP incorporates one Ethernet MAC at 10Gbits on a FPGA and is compliant with IEEE802.3ae specification. It is designed to be con...
249
1.0
NTP Client core
NetTimeLogic’s NTP Clientis a full hardware (FPGA) only implementation of a SNTPv4 Client according to RFC 4330/5905. It supports hardware timestampin...
250
1.0
CCSDS 131.2 Wideband Demodulator
The Creonic CCSDS high performance wideband demodulator performs all tasks of an inner receiver. It allows for processing symbol rates of 500 Msymb/s ...
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