Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5 IP
1
3.0
Wideband DDC
The Creonic Wideband Digital Down Converter (DDC) digitally converts the input signal at IF frequency down to baseband by multiplying input samples wi...
2
2.0
DVB-GSE Encapsulator and Decapsulator
The DVB-GSE encapsulator and decapsulator IP cores close the gap between network protocols like Ethernet and the physical layer of the DVB family of s...
3
1.0
DVB-S2X Wideband Demodulator
The Creonic DVB-S2X high performance wideband demodulator performs all tasks of an inner receiver and achieves throughputs of up to 500 ...
4
0.0
BCH Decoder
A highly configurable hardware IP core that performs error detection and correction using Bose–Chaudhuri–Hocquenghem (BCH) codes. It detects and corre...
5
0.0
BCH Encoder
A fully parameterizable SystemVerilog IP core implementing systematic encoding for binary BCH (Bose-Chaudhuri-Hocquenghem) codes. The core supports ar...