Design & Reuse
arrow AES Encryption Core (96)
arrow Cryptography (192)
arrow Data Integrity - Error Correction (18)
arrow Embedded Security Modules (19)
arrow Hardware Accelerator (42)
arrow MACsec, IPsec (35)
arrow Post-Quantum Solutions (34)
arrow PUF Based (20)
arrow Random Number Generator (RNG) (17)
arrow Root of Trust (22)
arrow Security Platform (36)
arrow Sensors & Monitors (9)
540 IP
101
10.0
Secure-IC's Securyzr™ Deterministic Random Bit Generator (DRBG)
The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographicall...
102
10.0
Secure-IC's Securyzr™ Inline Decrypter IP Core
The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash. It is often used to protect the source code from decompiling o...
103
10.0
Secure-IC's Securyzr™ SHA-3 Crypto Engine
The SHA-3 crypto engine has integrated flexibility and scalability to allow for high throughput and a configurable number of hashing rounds per clock ...
104
10.0
Security Protocol Accelerator for SM3 and SM4
SM3 and SM4 are commercial cryptographic standards issued and regulated by the Chinese Office of State Commercial Cryptography Administration (OSCCA)...
105
10.0
Performance-efficient, ultra-low power, compact ARC SEM security processors help protect against logical, hardware, physical and side-channel attacks
The Synopsys ARC® SEM Family of performance-efficient, ultra-low power, compact security processors enables designers to integrate security into their...
106
10.0
Agile Secure Element
Our Agile Secure Element IP provides designers with the flexibility to customise security features according to specific application requirements with...
107
10.0
Digital Physical Unclonable Function (PUF) IP
Our Digital PUF IP is a digital version of our quantum-based PUF IP (see QDID). The Logic-based Digital PUF IP is a strong hardware root-of-trust for ...
108
10.0
KiviHash-SHA-3 Secure Hash Algorithm (SHA-3) IP Core
The KiviHash-SHA-3 (secure hash algorithms) is a hardware accelerator for cryptographic hashing functions. It is an area efficient and high throughput...
109
10.0
Ultra High Performance AES-XTS/ECB Core
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
110
10.0
Ultra High-Performance AES-GCM/CTR IP
The proliferation and expansion of connected devices, connectivity infrastructure, cloud computing, and artificial intelligence is driving for increas...
111
10.0
FortifyIQ High-Performance Quantum-Ready CryptoBox IP Core (AES, HMAC-SHA2, RSA/ECC, PQC) SCA/DPA/FIA-Resistant)
FortifyIQ’s High-Performance Hybrid Crypto Box IP core delivers maximum cryptographic throughput by combining classical asymmetric (RSA, ECC), symmetr...
112
10.0
FortifyIQ's Compact Crypto Box IP Core for Resource-Constrained Devices (AES, ECC/RSA etc.) SCA/DPA/FIA resistant
FortifyIQ’s Crypto Box IP core is a compact, power-efficient cryptographic engine that combines essential asymmetric algorithms (RSA, ECC) with high-s...
113
10.0
Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
eSi-PQC-HT is a post quantum ready Public Key Crypto HW acceleration library, optimized for networking applications. eSi-PQC-HT supports the followi...
114
10.0
Programmable Mode AES Encryption / Decryption Security Core
The AES-P encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit ...
115
10.0
tRoot Fx Hardware Secure Modules: Programmable Root of Trust
Synopsys tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselv...
116
10.0
tRoot Vx Hardware Secure Modules
Synopsys IP tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate thems...
117
10.0
True Random Number Generator for NIST SP 800-90c
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
118
10.0
True Random Number Generators
The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require ...
119
10.0
Quantum-Driven Hardware Root-of-Trust - Physical Unclonable Function (PUF)
Our patented semiconductor design is the most secure hardware root-of-trust available to create unforgeable device identities and cryptographic keys. ...
120
9.0
TRNG fully compliant with NIST 800-22
The eSi-TRNG is a high quality implementation of a True Random Number Generator fully compliant with latest NIST 800-22. The block uses a standard AM...
121
8.0
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core. It supports three HASH algorithms: MD5, SHA1, SHA256. A S/G DMA engine keeps the core runni...
122
8.0
Secure Hash Algorithm-3 (SHA-3)
CYB-SHA3 implements Secure Hash Algorithm-3 (SHA-3) family of functions on binary data with the NIST FIPS 202 Standard. It supports cryptographic hash...
123
8.0
Secure-IC's Securyzr™ SM4-GCM Multi-Booster
The SM4-GCM Multi-Booster crypto engine is a scalable implementation of the SM4-GCM algorithm compliant with the standard GBT.32907-2016 published by ...
124
8.0
AES Encoder and Decoder
CYB-AES implements Rijndael cipher encoding and decoding in compliance with the NIST Advanced Encryption Standard. It supports all of the available ke...
125
8.0
AES supporting ECB, CBC and XTS/XEX modes. Includes DMA and AXI interface.
This is a high performance, small footprint crypt/decrypt IP Core. It features up to 8 independent crypt engines. Three DMA engines make sure the cor...
126
8.0
SHA256 Encoder and Decoder
SHA256 is a Secure Hash Algorithms which is one of the latest hash functions standarized by the U.S Federal Government. SHA 256 IP Core Algorithm impl...
127
8.0
ZLIB compatible compression and decompession, with DMA and AXi interface
This is a high performance, small footprint ZLIB compatible IP Core. It features 3 DMA engines, AXI interconnect and separate clocks for AXI interface...
128
8.0
FortifyIQ's Secure Hybrid Crypto Box IP Core with Classical and Post-Quantum Cryptography for Embedded Systems (AES, HMAC-SHA2, ECC/RSA etc., PQC) (SCA,DPA,FIA secure)
FortifyIQ’s Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a bu...
129
8.0
CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
eSi-Dilithium is a hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard. Dilithium is an integral part o...
130
8.0
CRYSTALS Kyber core for accelerating NIST FIPS 203 Key Encapsulation Mechanism
eSi-Kyber is a hardware accelerator core designed to accelerate post-quantum Key Encapsulation Mechanism (KEM) as defined by NIST FIPS 203. Kyber, a...
131
7.0
MACsec 10G/25G
Comcores MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE...
132
7.0
Falcon IP Core
Falcon IP Core is a post-quantum digital signature algorithm (DSA). It is currently under development. It is going to be compliant with Falcon specifi...
133
7.0
ECDSA IP Core
ECDSA IP Cores perform digital signature generation and verification in compliance with the Elliptic Curve Digital Signature Algorithm (ECDSA) specifi...
134
7.0
AES GCM IP Core
AES GCM IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197"...
135
7.0
AES IP Core
AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Advanced Encryption Standard (AES) specification in "FIPS 197". Th...
136
7.0
SHA3 IP Core
SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard...
137
7.0
Dilithium IP Core
Dilithium IP Core is a post-quantum digital signature algorithm (DSA). It currently supports Sign and Verify functions, with key generation functional...
138
7.0
DRBG IP Core
DRBG IP Cores perform deterministic random bit generation in compliance with the standards and guidelines defined in 'NIST SP 800-90A'. This standard ...
139
7.0
TRNG IP Core
TRNG IP Cores perform true random number generation in compliance with the standards and guidelines defined in 'NIST SP 800-90B'. This standard specif...
140
7.0
RSA IP Core
RSA IP Cores perform digital signature generation and verification in compliance with the RSA (Rivest-Shamir-Adleman) Digital Signature Algorithm spec...
141
7.0
RSA Keygen IP Core
RSA Keygen IP Cores perform key generation in compliance with the RSA Key Pair Generation specifications defined in 'FIPS 186'. This standard specifie...
142
7.0
External NOR Flash Protection
PUFxip is the extension function available for PUFcc, extending the Hardware Root of Trust to protect critical assets in the NOR Flash. PUFxip can wid...
143
7.0
KYBER IP Core
Kyber IP is a core designed for Kyber post-quantum Key Encapsulation Mechanism (KEM). It currently supports the Encapsulation and Decapsulation functi...
144
6.0
ECC Accelerator
Elliptic Curve Cryptography accelerator IP for secure key exchange and digital signatures. Silicon-proven and optimized for embedded systems....
145
6.0
Keccak/SHA3 Accelerator
SHA-3 and Keccak hash accelerator IP for secure hashing and message authentication....
146
6.0
Secure Enclave (RISC-V Based)
A secure enclave subsystem based on RISC-V, integrating cryptographic accelerators and secure software libraries. Hardware is silicon-proven; software...
147
6.0
AES Accelerator (128/256-bit)
AES encryption/decryption engine with side-channel resistance. Supports 128- and 256-bit key lengths....
148
6.0
DVB-S2X FEC encoder
The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud). The Core implements a very efficient parallel architecture ...
149
6.0
External NAND Flash Protection
PUFenc is the extension function available for PUFcc, extending the Hardware Root of Trust to protect critical assets in the NAND Flash. PUFenc can wi...
150
5.0
256-bit SHA Crypto Processor Core
The SHA-256 encryption IP core is a fully compliant implementation of the Message Digest Algorithm SHA-256. It computes a 256-bit message digest for m...