Design & Reuse
504 IP
301
1.0
Enhanced AES with CCM mode
FIPS-197 Compliant. Encrypt and decrypt modules with 128, 192 and 256 bit keys. Various versions are available, from small area to high performance, u...
302
1.0
Power and area optimised Bitcoin miner engine
The eSi-BTC core is a Bitcoin miner engine that perform double SHA256 Hash. It is design to deliver best in class silicon area and power for the next...
303
1.0
PUF-based Hardware Root of Trust
PUFrt is a Hardware Root of Trust (HRoT) offering the essential features necessary for establishing a trusted foundation from which all security opera...
304
1.0
Cypher Processor IP
Vivante’s CYP800 (CYPher) Processor IP encryption and decryption fabric provides a unified data encryption and decryption infrastructure for the SoC...
305
0.0
HDCP 2.x Receiver IP
HDCP 2.3 Receiver core is compliant with standard HDCP specification as 2.2 and 2.3. Through its compatibility, it provides a simple interface to a wi...
306
0.0
HDCP 2.x Transmitter IP
HDCP 2.3 Transmitter core is compliant with standard HDCP specification as 2.2 and 2.3. Through its compatibility, it provides a simple interface to a...
307
0.0
STAR Memory System ECC IP
Synopsys SLM STAR ECC 6 IP is a stand-alone product used to mitigate against soft errors in memories with the goal of improving in-field reliability...
308
0.0
Secure-IC's Securyzrâ„¢ ARIA Crypto Engine
The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea. It is compliant wit...
309
0.0
RADIX-M Emulation Based Security Verification
Radix-M provides SoC system level hardware security verification leveraging commercial emulators for firmware and hardware security validation. By run...
310
0.0
RADIX-S - Simulation Based Security Verification
Radix-S is used during design creation and verification to detect and remediate security issues in IP blocks and subsystems of an SoC. Its advanced i...
311
0.0
ECC Core
Rambus Error Correction Coding (ECC) Core implements the standard Hamming Code based DRAM Single Error Correction (SEC) and Double Error Detection (DE...
312
0.0
In-line Multi-Protocol Cipher Engine
The EIP-96 is an Inline Cryptographic Accelerator designed to accelerate and offload the very CPU intensive IPsec, MACsec, SRTP, SSL, TLS and DTLS pro...
313
0.0
SNOW Crypto Accelerator
The EIP-46 cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI. Desig...
314
0.0
Camellia Crypto Accelerator
The Camellia Engine implements the Camellia crypto algorithm, as specified in “Specification of Camellia” and RFC3713. Designed for fast integra...
315
0.0
ARC4 Crypto Accelerator
The EIP-44 is the IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec). Designed for fast integration, low gate count a...
316
0.0
AES Key Wrap Crypto Accelerator
The EIP-37 is the IP for accelerating the AES Key Wrap cipher algorithm (NIST-Key-Wrap & RFC3394). Designed for fast integration, low gate count and f...
317
0.0
AES-ECB-CBC-CFB-OFB-CTR Crypto Accelerator
The EIP-36 AES Engines implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publ...
318
0.0
AES-ECB Accelerator
The EIP-32 AES Engines implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publ...
319
0.0
AES-GCM Multi-channel upto 2Tbps Crypto Accelerator
The EIP-63, high speed AES-GCM engine is a scalable high-performance, multi-channel cryptographic engine that offers AES-GCM operations as well as AES...
320
0.0
HMAC Accelerator with SHA-3, SHA-2, SHA-1
The EIP-59 is the IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231),...
321
0.0
ARIA Crypto Accelerator
The EIP-11 ARIA algorithm, as specified in RFC 5794. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedba...
322
0.0
SM4 Crypto Accelerator
The EIP-12 SM4 Engine implements the SM4 cipher block algorithm. The accelerator includes I/O registers, encryption and decryption cores. Designed for...
323
0.0
ChaCha20 Crypto Accelerator
The EIP-13 ChaCha engine implements the ChaCha20 algorithm, as specified by [ChaCha]. The accelerators include I/O registers and an encryption/decrypt...
324
0.0
Poly1305 Crypto Accelerator
The EIP-53 Poly engine is an efficient hardware implementation of the Poly1305 algorithm, as specified by the Internet Research Task Force (IRTF), RFC...
325
0.0
DPA Resistant Software Library
Addressing the growing demand for readily available solutions that implement Differential Power Analysis (DPA) countermeasures, we developed a family ...
326
0.0
FIPS Security Toolkit for OpenSSL
The Rambus FIPS Security Toolkit (formerly from Inside Secure) is a complete cryptographic security solution for IoT providing the tools required to s...
327
0.0
AES-ECB-CBC-CFB-OFB-CTR-GCM-XTS-CCM Crypto Accelerator
The EIP-39 AES Accelerators implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS)...
328
0.0
AES + SHA DMA Crypto Accelerator
The EIP-120 is a low-power low-gatecount crypto core with DMA capability and local key storage. Compared to a software only solution, the core provide...
329
0.0
KASUMI Engine
As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-06 KASUMI Engine implement the Specification of the 3GP...
330
0.0
RSA-ECC Public Key Accelerator Engine
The EIP-28 is a range of Public Key Accelerators operating as co-processors to offload Public Key operations from the Host processor....
331
0.0
AES-GCM-XTS Crypto Accelerator
The EIP-38 - AES/GCM/XTS/LRW Engines are specifically suited for next generation processors deployed in networking and storage appliances that need to...
332
0.0
RSA-ECC Public Key Accelerator Engine
The EIP-150 is an integrated module combining the Public Key Acceleration module, True Random Generator, interrupt controller and a standard bus inter...
333
0.0
AES-GCM Single-channel Crypto Accelerator
The EIP-61 is the IP for accelerating AES-GCM based cryptographic solutions. Designed for easy integration and very high performance the EIP-61 crypto...
334
0.0
Circuit Camouflage Technology
Rambus Circuit Camouflage Technology (formerly Inside Secure), also known as SecureMedia Library (SML), is an anti-reverse engineering and anti-clonin...
335
0.0
Low Power Security Engine
Low Power, area-efficient, timing and side channel attack resistant security Accelerator Engine IP. Designed to meet the security requirement of resou...
336
0.0
NIST P-256/P-384 ECDH+ECDSA
The NIST P-256/P-384 ECDH+ECDSA can be used for elliptic curve key generation, computation of Diffie-Hellman shared secrets as well as for ECDSA signa...
337
0.0
QuarkLink - software-based IoT security platform
QuarkLink is our software-based IoT security platform that securely connects IoT devices to server-hosted apps on-premises or in the cloud. QuarkLink ...
338
0.0
Advanced DPA- and FIA-resistant FortiCrypt AES SW library
Intro The FortiCrypt software library provides ultra-strong protection against SCA and FIA while preserving exceptionalperformance enabling encryption...
339
0.0
Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 SW library
Intro The FortiMac library belongs to the FortiMac product family. This software library provides ultra-strong protection against SCA, FIA, and cache ...
340
0.0
Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 IP core
Intro The HMAC-SHA2-DPA-FIA IP core belongs to the FortiMac product family. Like all the FortiMac product family members, this IP provides ultra-stron...
341
0.0
Interlaken FEC (ILKN FEC)
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342
0.0
ECDSA sign engine
Elliptic curves form the foundation of cutting-edge public-key cryptography, serving as a crucial component for secure digital signatures and robust k...
343
0.0
Advanced Encryption Standard Cryptographic Co-Processor
DAES is a cryptographic co-processor which implements Rijndael encryption algorithm compliant with FIPS 197 Advanced Encryption Standard. AES is a wid...
344
0.0
SHA-3 Crypto Engine
The SHA-3 – secure hash algorithms – crypto engine is a hardware accelerator for cryptographic hashing functions. It is an area efficient ...
345
0.0
Integrity and Data Encryption (IDE) Security Module IP for CXL 3.0
The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators...
346
0.0
AES Encrypt/Decrypt Core
The AES encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit bl...
347
0.0
TESIC CC EAL5+ Secure Element IP Core
TESIC is a CC EAL5+ PP0084 proven/certification-ready secure element IP that is delivered as hard macro for plug-and-play System-on Chip (SoC) integra...
348
0.0
Suite-Q (TM) HW cryptographic solution
Suite-Q™ HW is a complete system-on-chip (SoC) design features all standardized cryptography needed for secure protocols in a small and efficien...
349
0.0
NCR Processor
NCR (Network Clock Reference) is a procedure to provide the master clock (i.e. time information) of the satellite to all its user terminals. Typically...
350
0.0
nQrux - Hardware Trust Engines
Xiphera's nQrux™ family of Hardware Trust Engines offers ready-to-implement security modules for various security architectures. The nQrux&t...