Design & Reuse
2 IP
1
0.7246
WIDE IO Memory Model
WIDE IO Memory Model provides an smart way to verify the WIDE IO component of a SOC or a ASIC. The SmartDV s WIDE IO memory model is fully compliant w...
2
0.7246
WIDE IO2 Memory Model
WIDE IO2 Memory Model provides an smart way to verify the WIDE IO2 component of a SOC or a ASIC. The SmartDV s WIDE IO2 memory model is fully complian...