Design & Reuse
Catalog of SIP Cores
System on Chip design resources

PCIe 3.1 Serdes PHY IP, Silicon Proven in TSMC 28HPCP

(PCIe 3.1) x4 PHY IP supports PCIe3.1 transmission. This is compliant with PCIe Rev3 Base Specification with support of PIPE 4.3 interface spec. Input...