Design & Reuse
Catalog of SIP Cores
System on Chip design resources

USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+

The Combo PHY is a complete USB 3.0 and PCIe 2.0 PHY IP solution designed for a mobile and data consumer applications in TSMC 28nm process. It support...