eetimes.com, Apr. 29, 2025 –
Cadence Design Systems has entered into a definitive agreement to acquire Arm’s Artisan Foundation IP business, complementing its AI and chiplet ambitions. This includes standard cell libraries, memory compilers, and GPIOs—components critical for advanced node SoCs and modular designs.
“With the addition of Arm’s Artisan IP, Cadence will enter the foundation IP market and support new growth across design services and chiplet offerings,” said Boyd Phelps, SVP and GM of the silicon solutions group at Cadence.
The acquisition strengthens Cadence’s full-stack offering of tools, IP, and services and brings in an engineering team that will strengthen chiplet enablement.
In an exclusive conversation with EE Times, Alok Jain, corporate VP of R&D at Cadence Design Systems India, explained the company’s vision for AI-driven transformation, developing AI-enabled tools, advancing the 3D IC and chiplet-based design, and bridging the gap between academia and industry. He also talked about the company’s aggressive push to promote India as an innovation hub.
Jain explained how the industry is rapidly shifting from monolithic SoCs to multi-die, multi-node architectures. “3D ICs and chiplets are no longer theoretical; they are production-ready,” he said, citing Intel’s Meteor Lake as an example of a real-world chiplet deployment—built using multiple foundries and process nodes.
Jain spoke about the company’s integrated 3D IC platform that combines design (Virtuoso), packaging (Allegro), and thermal and electromagnetic analysis tools from across the Cadence suite. “We are partnering with foundries like TSMC and Intel Foundry to certify and enable these 3D IC designs. Our platform is engineered to handle that level of complexity.”