May. 08, 2025 –
New class of processor raises the bar for performance efficiency, delivering 30% area savings and 20% lower power
SAN JOSE, Calif. - May 7, 2025 — Cadence (Nasdaq: CDNS) today announced the Cadence® Tensilica® NeuroEdge 130 AI Co-Processor (AICP), a new class of processor designed to complement any neural processing unit (NPU) and enable end-to-end execution of the latest agentic and physical AI networks on advanced automotive, consumer, industrial and mobile SoCs. Based on the proven architecture of the highly successful Tensilica Vision DSP family, the NeuroEdge 130 AICP delivers more than 30% area savings and over 20% savings in dynamic power and energy without impacting performance. It also leverages the same software, AI compilers, libraries and frameworks to deliver faster time to market. Multiple customer engagements are currently underway, and customer interest is strong.
“With the rapid proliferation of AI processing in physical AI applications such as autonomous vehicles, robotics, drones, industrial automation and healthcare, NPUs are assuming a more critical role,” said Karl Freund, founder and principal analyst of Cambrian AI Research. “Today, NPUs handle the bulk of the computationally intensive AI/ML workloads, but a large number of non-MAC layers include pre- and post-processing tasks that are better offloaded to specialized processors. However, current CPU, GPU and DSP solutions involve tradeoffs, and the industry needs a low-power, high-performance solution that is optimized for co-processing and allows future proofing for rapidly evolving AI processing needs.”
Featuring an extensible design that enables seamless compatibility with in-house NPUs, Cadence Neo™ NPUs and third-party NPU IP, the Tensilica NeuroEdge 130 AICP performs offloaded tasks with high performance and better efficiency than its application-specific predecessors. Taking the inherent power, performance and area (PPA) advantages of Tensilica DSPs to new levels, the NeuroEdge 130 AICP delivers over 30% area savings and a more than 20% reduction in dynamic power and energy with comparable performance to Tensilica Vision DSPs on AI networks and operators. Other benefits include:
“Cadence has proven AI co-processor use cases with our Tensilica DSPs. With AI workloads transforming and becoming less domain-specific, our AI SoC and systems customers have been seeking a small and efficient AI-focused co-processor for better PPA and future-proofing,” said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. “Continuing our track record of IP innovations, we’ve introduced a purpose-built new class of processor. Designed as an NPU companion, the Tensilica NeuroEdge 130 AICP raises the bar for performance efficiency to address our customers’ most demanding AI applications.”
“AI and computer vision are playing an important role in a growing range of embedded applications,” said Jeff Bier, founder of the Edge AI and Vision Alliance. “But AI models and associated pre- and post-processing steps are evolving rapidly; for example, today many developers are adopting transformer-based multimodal models and LLM-based AI agents. We applaud Cadence’s ongoing innovation in flexible and efficient processors, which are key to making edge AI and vision widely deployable.”
The Tensilica NeuroEdge 130 AICP is supported by the Cadence NeuroWeave™ Software Development Kit (SDK), a single SDK used across all of Cadence’s AI IP. Leveraging the Tensor Virtual Machine (TVM) stack, the NeuroWeave SDK is easy to use and allows architects to tune, optimize and deploy their AI models for Cadence’s AI IP. The Tensilica NeuroEdge 130 AICP also comes equipped with a lightweight standalone AI library, allowing customers to directly program AI layers on the new processor and bypass potential overheads of some compiler frameworks.
Customer and Partner Endorsements
“As a leader in SoC solutions targeting the automotive market, indie focuses on SoC architecture innovation to deliver high performance with area and power efficiency. To achieve this, we integrate processing elements into our SoCs optimally suited to particular computational functions, ensuring that our solutions can meet the demands of ADAS systems for computer vision, radar and sensor fusion. indie has successfully deployed Tensilica DSPs in multiple production ADAS SoCs. We welcome the addition to Cadence’s IP portfolio of the NeuroEdge AICP and supporting tools, software libraries and ecosystem to address evolving AI-enabled automotive applications.”
Hervé Brelay, Vice President of SW Engineering at indie
“MulticoreWare’s longstanding partnership with Cadence has positioned us to support OEMs and Tier 1 partners deploying AI workloads in automotive and other edge environments. Through these collaborations, we’ve observed firsthand how NPUs often fall short as a complete, standalone AI deployment solution. Building on Cadence’s leadership in DSP technology, the new NeuroEdge AICP hardware and SDK elegantly address this gap. AI SoC modules built around the NeuroEdge AICP not only deliver peak performance for today’s leading models but also offer the flexibility to accommodate future AI innovations.”
Dr. John Stratton, CTO, MulticoreWare
“Neuchips is revolutionizing data centers and server farms with cutting-edge SoCs designed to handle the immense processing demands of large language models and transformers. As the SoC AI subsystems are frequently challenged with supporting pre- and post-processing stages, it is great to see that the NeuroEdge AICP is designed to manage such tasks. Cadence’s mature Tensilica toolchain and software infrastructure help make it easy to integrate this new IP into complex SoC designs.”
Ken Lau, CEO of Neuchips
Availability
The Tensilica NeuroEdge 130 AICP is generally available now and is ISO 26262-ready for the automotive market. To learn more, visit the Cadence Tensilica NeuroEdge 130 AICP landing page.
About Cadence
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.