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Industry Articles
NoC Interconnect Improves SoC Economics
(Monday, May 9, 2011)
Functional safety poses challenges for semiconductor design
(Thursday, May 5, 2011)
Embedded antifuse NVM: A mission critical IP for display driver ICs
(Monday, May 2, 2011)
TLM 2.0 Standard into Action: Designing Efficient Processor Simulators
(Monday, May 2, 2011)
Scaling a video on demand server
(Thursday, April 28, 2011)
DSPs with PCI Express interface extend connectivity while improving performance and power efficiency
(Thursday, April 28, 2011)
An IP-XACT Deployment Case: IZARN IP
(Monday, April 25, 2011)
Challenges of safety-critical multi-core systems
(Monday, April 25, 2011)
Facilitating at-speed test at RTL (Part 2)
(Thursday, April 21, 2011)
Systematic approach to verification of a mixed signal IP - HSIC PHY case study
(Thursday, April 21, 2011)
Facilitating at-speed test at RTL (Part 1)
(Monday, April 18, 2011)
Cache Evaluation Software: A Dynamically Configurable Cache Simulator
(Monday, April 18, 2011)
Using verification coverage with formal analysis
(Thursday, April 14, 2011)
M-PHY benefits and challenges
(Wednesday, April 13, 2011)
Analyzing multithreaded applications - Identifying performance bottlenecks on multicore systems
(Monday, April 11, 2011)
Minimal Effort Chip Design Using IP
(Monday, April 11, 2011)
CORTEX-R versus CORTEX-M
(Thursday, April 7, 2011)
How to achieve quality assurance for your electronic designs
(Wednesday, April 6, 2011)
Implementing Different Power Features in an IP
(Monday, April 4, 2011)
The Power and Bandwidth Advantage of an H.264 IP Core with 8-16:1 Compressed Reference Frame Store
(Monday, April 4, 2011)
Attofarad accuracy for high-performance memory design
(Thursday, March 31, 2011)
Complete NAND Flash Solution: Logic, PHY and File System Software
(Monday, March 28, 2011)
System awareness improves SOC power management
(Thursday, March 24, 2011)
Hardware Configuration Management and why it's different than Software Configuration Management
(Thursday, March 24, 2011)
The real role of EDA in the Cloud
(Thursday, March 24, 2011)
Using simulation and emulation together to create complex SoCs
(Wednesday, March 23, 2011)
Analog IP for multimedia SoCs: an eye on a world of essential analog features
(Wednesday, March 23, 2011)
What makes an optimal SoC verification strategy
(Monday, March 21, 2011)
What’s the number of ASIC versus FPGA design starts?
(Monday, March 21, 2011)
The Challenges and Benefits of Analog/Mixed-Signal and RF System Verification above the Transistor Level
(Monday, March 21, 2011)
Vertically Integrated MIPI Solutions
(Monday, March 21, 2011)
Verification of USB 3.0 Device IP Core in Multi-Layer SystemC Verification Environment
(Thursday, March 17, 2011)
Analog switches in D-PHY MIPI dual camera/dual display applications (Part 2 of 2)
(Thursday, March 17, 2011)
Test tools to empower engineers for PCIe 3.0 designs
(Monday, March 14, 2011)
A 55-nm Ultra Low Leakage SRAM Compiler with Optimized Power Gating Design
(Monday, March 14, 2011)
Analog switches in D-PHY MIPI dual camera/dual display applications (Part 1 of 2)
(Monday, March 14, 2011)
Hardware/Software integration: Closing the gap
(Monday, March 14, 2011)
Planning reset strategy: Flow & functionality in OVC
(Thursday, March 10, 2011)
How manycore will reshape EDA
(Wednesday, March 9, 2011)
Major changes expected for physical verification tools as designs move into 28nm and below
(Tuesday, March 8, 2011)
Using PCI Express as a fabric for interconnect clustering
(Tuesday, March 8, 2011)
Hardware Co-Verification using VMM HAL-SCEMI On ChipIT Platform
(Monday, March 7, 2011)
Introduction to SVA Assertions for Design Engineers
(Monday, March 7, 2011)
CPUs in FPGAs: many faces to a trend
(Monday, March 7, 2011)
STOP! Are You Gambling On Your Memory IP?
(Friday, March 4, 2011)
Expediting processor verification through testbench infrastructure reuse
(Thursday, March 3, 2011)
Adding encryption to disk drives is made easy using an IP core
(Thursday, March 3, 2011)
Think static analysis cures all ills? Think again.
(Wednesday, March 2, 2011)
Mixed-Signal = Analog + Digital, or is there more to it?
(Tuesday, March 1, 2011)
CoreMark: A realistic way to benchmark CPU performance
(Tuesday, March 1, 2011)
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