Monday, November 1, 2021

• Why Low Complexity Video Coding is Answer to UHD TV Success

Wednesday, October 27, 2021

• An Unexpected IoT Problem: Not Enough Randomness

Sunday, October 24, 2021

• Software Architecture for DO-160 Qualification of STM32H7 based systems

Thursday, October 21, 2021

• Resilience in Space: Designing Radiation-Tolerant Systems

Tuesday, October 19, 2021

• Paving the way for the next generation audio codec for TRUE Wireless Stereo (TWS) applications - PART 4 : Achieving the ultimate audio experience

Wednesday, October 13, 2021

• Economics of the FPGA

Monday, October 11, 2021

• Why 400G/800G and Beyond Ethernet for High-Performance Computing Systems

Sunday, October 10, 2021

• What makes JPEG XS technology different from other codecs?

Wednesday, October 6, 2021

• Performance Auto Sweep
• The Network Switch: Unsung Hero of the Hyper-Scale Data Center

Sunday, October 3, 2021

• Securing the IC Supply Chain - Integrating PUF-Based hardware security

Wednesday, September 29, 2021

• Are you optimizing the benefits of cloud computing for faster reliability verification?
• Paving the way for the next generation of audio codec for True Wireless Stereo (TWS) applications - PART 5 : Cutting time to market in a safe and timely manner
• Chiplet Strategy is Key to Addressing Compute Density Challenges

Sunday, September 26, 2021

• High Bit-Rate Controllers for MIPI CSI2
• Differentiation Through the Chip Design and Verification Flow

Sunday, September 19, 2021

• PUFiot: An Essential Secure Coprocessor for RISC-V

Tuesday, September 14, 2021

• Out of the Verification Crisis: Improving RTL Quality
• How NoCs ace power management and functional safety in SoCs

Sunday, September 12, 2021

• How PUF-based RoT Can Solve IoT Security Issues

Sunday, August 29, 2021

• Securing UART communication interface in embedded IoT devices
• eNVM towards 40nm and beyond

Sunday, August 22, 2021

• EDA in the Cloud Will be Key to Rapid Innovative SoC Design