Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Videos
Subscribe to D&R SoC News Alert
English
Mandarin
Login
Catalog of SIP Cores
System on Chip design resources
Catalog of SIP Cores
System on Chip design resources
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Videos
Subscribe to D&R SoC News Alert
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller & PHY
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Design Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Blogs
USB4 Version 2.0 - Gen4 High-Speed Lane Initialization and Training
(Monday, October 30, 2023)
The Road Ahead
(Monday, October 30, 2023)
Efficiently Packing Neural Network AI Model for the Edge
(Monday, October 30, 2023)
Bringing Power Efficiency to TinyML, ML-DSP and Deep Learning Workloads
(Monday, October 30, 2023)
How Will EDA Benefit from the AI Revolution?
(Thursday, October 26, 2023)
Different approach to implementing multi-monitor - single scoreboard than using the macro `uvm__analysis_imp_decl
(Thursday, October 26, 2023)
Addressing memory safety with software
(Thursday, October 26, 2023)
Rambus HBM3 Controller IP Gives AI Training a New Boost
(Thursday, October 26, 2023)
Rambus HBM3 Controller IP Gives AI Training a New Boost
(Wednesday, October 25, 2023)
Why eMMC is still a good low-budget storage option?
(Tuesday, October 24, 2023)
Causes of memory unsafety
(Tuesday, October 24, 2023)
Optimizing AI models for Arm Ethos-U NPUs using the NVIDIA TAO Toolkit
(Monday, October 23, 2023)
Utilizing CXL 2.0 IP in the Defense Sector: A Revolution in Secure Computing
(Monday, October 23, 2023)
Buffer bound vulnerabilities and their dangers
(Friday, October 20, 2023)
Neural Network Model quantization on mobile
(Friday, October 20, 2023)
Why You Can't Trust Your NPU Vendor's Benchmarks
(Friday, October 20, 2023)
Rambus Joins Arm Total Design
(Friday, October 20, 2023)
Don't Risk Failure - The Verification Process Begins During Chip Architecture
(Thursday, October 19, 2023)
Why CAN FD when you can CAN XL?
(Wednesday, October 18, 2023)
RISC-V: An Open Standard - Backed by a Global Community - to Enable Open Computing for All
(Tuesday, October 17, 2023)
Formal verification best practices: sign-off and wrap-up
(Monday, October 16, 2023)
Revolutionizing Electronic Circuit Testing and Debugging Using JTAG
(Monday, October 16, 2023)
Develop Software for the Cortex-M Security Extensions Using Arm DS and Arm GNU Toolchain
(Monday, October 16, 2023)
Concerned about your Memory Subsystem Performance? - Verify confidently with Synopsys DFI Verification IP
(Monday, October 16, 2023)
Journeying Beyond AI: Unleashing the Art of Verification
(Friday, October 13, 2023)
Journeying Beyond AI: Unleashing the Art of Verification
(Friday, October 13, 2023)
CHES Celebrates 25 Years, Names Paper by Intrinsic ID Founders in the Top 3 Most-Cited Papers in the History of the Conference
(Thursday, October 12, 2023)
Elusive IPOs
(Thursday, October 12, 2023)
Are common memory protection mechanisms adequate?
(Thursday, October 12, 2023)
Ensuring the Health and Reliability of Multi-Die Systems
(Thursday, October 12, 2023)
Formal verification best practices: checking data corruption
(Tuesday, October 10, 2023)
Arm A-Profile Architecture Developments 2023
(Monday, October 9, 2023)
Unsafe memory access is ruinous
(Thursday, October 5, 2023)
How Collaboration Will Accelerate Adoption of Multi-Die Systems
(Thursday, October 5, 2023)
Synopsys AMBA Verification IP (VIP) Supports Latest AXI-K Specification from Arm
(Thursday, October 5, 2023)
Formal verification best practices: towards end-to-end properties
(Tuesday, October 3, 2023)
Cadence Generative AI Solution: A Comprehensive Suite for Chip-to-System Design
(Tuesday, October 3, 2023)
Driving Connectivity and Communication Exploring the Synergy of CAN XL and Ethernet IP in Automotive Applications
(Tuesday, October 3, 2023)
Ensuring IP Quality for a Better IP Experience
(Monday, October 2, 2023)
Alif Is Creating SoC Solutions for Machine Learning with Cadence and Arm
(Monday, October 2, 2023)
Cadence Targets Automotive Market Demands with UCIe
(Monday, October 2, 2023)
How LPDDR5X Delivers the Speed Your Designs Need
(Thursday, September 28, 2023)
Is DisplayPort really the future standard?
(Thursday, September 28, 2023)
MIPI DPHY Solution
(Wednesday, September 27, 2023)
AI Audio for Voice Enhancement: Deep into the Deep - Part 3
(Tuesday, September 26, 2023)
Formal verification best practices: investigating a deadlock
(Tuesday, September 26, 2023)
Renesas Collaborates on Large Language Model Generative AI Chip Design
(Friday, September 22, 2023)
Samsung Foundry and Synopsys Accelerate Multi-Die System Design
(Friday, September 22, 2023)
Demystifying the Qualification Process for Automotive Certification: ISO 26262 Compliance for CSI IP Products and Reliability Testing
(Friday, September 22, 2023)
New Unified Electrostatic Reliability Analysis Solution Has Your Chip Covered
(Thursday, September 21, 2023)
|
Previous
|
14
|
15
|
16
|
...
|
Next
|
Previous
