Design & Reuse
22 IP
1
23.0
Ultra-low-power RISC-V based GPU Processor
NEOX™ is a parallel multicore and multithreaded GPU architecture based on the RISC-V RV64IMFC instruction set with adaptive NoC. The number of cores v...
2
20.0
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...
3
20.0
Digital and mixed-signal IP and ASIC RISC-V reference design for USB Type-C/PD power adapter/charger
IQonIC Works USB-C/PD power adapter IP includes components required to build an integrated programmable power supply (PPS) charger solution.The USB Ty...
4
16.0
RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of i...
5
15.5556
SMD RISC-V SDK
Quickly and seamlessly develop, debug and fine-tune applications for Semidynamics RISC-V hardware with the SMD RISC-V SDK. It is a complete software d...
6
15.0
Security Enclave IP based on RISC-V
The eSecure IP is a single subsystem for SoC/ASIC/FPGA to address key security challenges, playing the role of root-of-trust. The module is highly fle...
7
5.2941
MIPI I3C Master RISC-V based subsystem
RISC-V based MAXVY MIPI I3C master interface has been developed to ease sensor system design architectures in mobile wireless products by providing a ...
8
5.2941
RISC V - CORE DEVELOPMENT
RISC-V (pronounced risk-five ) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015...
9
0.0
TESIC RISC-V CC EAL5 Secure Element Soft/Hard Macro
TESIC RISC-V is a CC EAL5+ PP0084 & PP0117 ready secure element IP including a secure 32-bit RISC-V core and that is delivered as soft IP or hard macr...
10
0.0
Azurite Core Hub Generators
The Azurite Core Hub Generator utilizes InCore's FlexiCore™ Technology to build a highly parameterized and configurable Core-Hub™ Gene...
11
0.0
Calcite Core-Hub
Meet the Calcite Core Generator, our solution for generating application-level cores that are Linux-capable. Calcite delivers an unparalleled balance ...
12
0.0
riscvOVPsim - RISC-V Instruction Set Simulator
The riscvOVPsim ISS is an ideal starting point for an embedded software development project. riscvOVPsim allows the development and debug of code for ...
13
0.0
AndeSight IDE
AndeSight™ has Standard, MCU, RDS and Lite versions and is an Eclipse-based integrated development environment that provides an efficient way to...
14
0.0
RISC-V SoC Universa
Universa RISC-V-based SoC is a ready-to-use HW/SW framework for developing any SoC solution. Brought to you by Vtool, a verification EDA company, RISC...
15
0.0
Kaveri - RISC V Microcontroller Platform
Kaveri, a RISC V Microcontroller Platform developed by us is the proof of our innovation and dedication to make a futuristic connected world. "Ka...
16
0.0
HiFive Unmatched Rev B
The development board is powered by the SiFive Freedom U740 (FU740), an SoC that includes a high-performance multi-core, 64-bit dual-issue, superscala...
17
0.0
RISC-V Timer IP
IQonIC Works RISC-V Timer IP comprises a suite of timers, each conforming to the RISC-V standard machine timer specification. For simple applications ...
18
0.0
RISC-V Platform-Level Interrupt Controller (PLIC) IP
IQonIC Works RISC-V PLIC IP is a platform-level interrupt controller conforming to the RISC-V PLIC specification, for use in systems with a large numb...
19
0.0
RISC-V Acceleration Factory
A complete product suite for integrating, verifying, and debugging embedded systems to increase software speed-power ratios 10 to 100 times. With Blue...
20
0.0
RISC-V-based SoC template
IOb-SoC is a RISC-V SoC template written in Verilog, which users can download for free, modify, simulate and implement in FPGA or ASIC. It supports st...
21
0.0
RISC-V UART
The IObundle UART is a RISC-V-based Peripheral written in Verilog, which users can download for free, modify, simulate and implement in FPGA or ASIC. ...
22
0.0
SCR, Syntacore s Family of Customizable Processor IP
State-of-the-art, synthesizable microprocessor core IP with RISC-V ISA: from the minimalistic MCU core for the deeply-embedded applications to the 1GH...