351 0.0

CCSDS 8160/ 7136 Decoder and Encoder ...

352 0.0

Manchester Encoder / Decoder The MAN_CODEC IP Core is a versatile encoder and decoder pair that converts a basic NRZ bitstream into a standard Manchester code and vice-versa. The ...

353 0.0

112G Ethernet PHY IP for TSMC N6 The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

354 0.0

112G LR-Max Ethernet PHY for TSMC N5 Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

355 0.0

DVB-C Demodulator IP Core The demodulator is designed to be used together with a cable tuner and an analog to digital converter (ADC). The system has an internal state machine ...

356 0.0

224G Ethernet PHY IP for TSMC N3E The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

357 0.0

GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in TSMC 28HPC+ For Gigabit 10/100/1000 Ethernet applications, the GPHY is a highly integrated single chip. It is a singleport, IEEE 802.3u/ab compatible, power effic...

358 0.0

GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in SMIC 28SF The GPHY is a highly integrated single chip for Giga 10/100/1000 Ethernet applications with minimal power consumption. It is capable of operating in 1...

359 0.0

Express Serial Peripheral Interface IP Core eSPI controller is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of standard eSPI specification. Through its eSP...

360 0.0

FSPI Controller – XIP functionality (SINGLE, DUAL, QUAD and OCTAL SPI Bus Controller with Double Data Rate support) The FSPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and phase of serial clo...

361 0.0

Octal SPI Controller – XIP functionality (SINGLE, DUAL, QUAD and OCTAL SPI Bus Controller with Double Data Rate support) and DMA Support Octal SPI master is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of Macronix (MX66LM1G45G) Octal SPI REV.1.0 sp...

362 0.0

5G-NR LDPC Encoder The Creonic 5G LDPC Encoder IP Core provides a perfect solution for this new LDPC structure with a high level of flexibility while maintaining high th...

363 0.0

Reed Solomon Decoder and Encoder FEC IP Core The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the input message in order to...

364 0.0

Integrated Secure Element (iSE) for high-end devices with HW isolated secure processing Secure-IC provides integrated Secure Elements (iSE) that can act as trust anchors to protect the security assets of a device. An iSE - also referred a...

365 0.0

112G Ultra-Low Power VSR PHY in TSMC N5 for optical modules and accelerators Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

366 0.0

100G Ethernet PCS IP The Synopsys 100G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the IEEE 802.3 standard, provides a complete set of features that enable ...

367 0.0

Doppler Channel IP Core The Creonic Doppler Channel IP is a Doppler shift frequency (DSF) generator capable of introduce a shift frequency to samples as a phase offset. The I...

368 0.0

16G Ethernet SerDes PHY Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...

369 0.0

Pulse Width Modulator The PWM IP core implements a compact and highly flexible Pulse Width Modulator. The core generates a repeated pattern of pulse trains of run-time conf...

370 0.0

Centralized Network Configurator (CNC) for TSN nodes such as endpoints and Switches Centralized Network Configurator or CNC is a component used in Time Sensitive Networking (TSN) networks. The CNC monitors data streams while coordinat...

371 0.0

10/100 Mb Media Access Controller Our innovative solution is a hardware implementation of media access control protocol defined by the IEEE standard. DMAC in cooperation with external ...

372 0.0

Fast Fourier Transform IP Core The Creonic Fast Fourier Transform IP Core implements the Decimation in Frequency - Fast Fourier Transform based on the Cooley-Tukey algorithm. The FF...

373 0.0

CCSDS SCCC Modulator/ Turbo Encoder ...

374 0.0

WiMAX IEEE802.16e Transceiver IP Core The transceiver is designed to be used together with an RF tuner and ADC/ DAC converters. The system has internal state machine to control the operat...

375 0.0

DVB-C2 LDPC/ BCH Decoder IP Core In Digital video broadcasting for cable systems systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes co...

376 0.0

Flash Memory LDPC Decoder IP Core In the Sum Product Algorithm (SPA) for LDPC decoding the messages are sent from the check nodes to bit nodes after the SPA steps which are (for one it...

377 0.0

high-performance solution for elliptic curve cryptography Our ECC IP Core represents a cutting-edge solution that brings the power of elliptic curve cryptography to your systems. Designed with versatility and...

378 0.0

ECDSA signature verification engine In addition to its support for various elliptic curves, CryptOne’s prowess extends to the widely acclaimed Elliptic Curve Digital Signature Algorithm ...

379 0.0

ECDSA signature verification engine In addition to its support for various elliptic curves, CryptOne’s prowess extends to the widely acclaimed Elliptic Curve Digital Signature Algorithm ...

380 0.0

ECDSA sign engine Elliptic curves form the foundation of cutting-edge public-key cryptography, serving as a crucial component for secure digital signatures and robust k...

381 0.0

ECDSA sign engine When safety & security meet the best size/performance ratio… ECDSA IP Core Elliptic curves form the foundation of cutting-edge public-key cryptograph...

382 0.0

1.25 Gbps EPON SerDes IP The MXL-SRDS-EPON is an Ethernet Passive Optical Network (EPON) transceiver implemented in digital CMOS technology. The SerDes IP offers data transfer...

383 0.0

Deserializer 1:32 for 8.5-11.3Gb/s for SONET/SDH, 10Ge, XFI, Back Plain PMCC_DSER12G is a macro-block designed for robust data/clock recovery and demultiplexing 1:32. The serializer (except 32 bit outputs) is implemented b...

384 0.0

Serializer 32:1 for 8.5-11.3Gb/s for SONET/SDH, 10Ge, XFI, Back Plain PMCC_SER12G is a macro-block designed for robust 8.5-11.3Gb/s data 32:1 serialization independent on data coding. The serializer (except 32 bit inputs...

385 0.0

Fractional N PLL 8.5-11.3GHz in GF N65 PMCC_PLL12GFN is a macro-block designed for synthesizing the frequencies required for fiber optic transceivers and serdes using convenient reference f...

386 0.0

112Gb/s PAM4 SERDES PHY 14nm The Ethernet PHY IP is used for CEI-112G applications and serializes 8b/10b encoded data for Gen1 and Gen2, as well as 128b/130b encoded data for Gen3...

387 0.0

APB Pulse Width Modulator The APB PWM Module is a standard APB peripheral that generates a programmable duty cycle output signal. The frequency of the output waveform is eithe...

388 0.0

Low-Latency 10/100/1000 Ethernet MAC The LLEMAC-1G implements an Ethernet Media Access Controller compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications. Feat...

389 0.0

112G Ethernet PHY for TSMC N5 Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

390 0.0

112G Ethernet PHY for VSR on TSMC N5 Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

391 0.0

112G Ethernet PHY IP for TSMC N6 The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

392 0.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

393 0.0

112G Ethernet PHY IP LR-Max for TSMC N4P Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

394 0.0

224G Ethernet PHY for TSMC 3nm The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

395 0.0

112G LR-Max Ethernet PHY for TSMC N5 Synopsys Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high performan...

396 0.0

Single Channel HDLC Controller Inicore's iniHDLC family of High-Level Data Link Controller (HDLC) cores consist of a Receiver (FPR: From Primary Rate) and a Transmitter (TPR: To Pri...

397 0.0

Universal G704-E1 Framer / Deframer Core The iniG704-E1 framer core is designed to handle synchronous frame structures (Recommondation G.704) running on E1 carrier. Transmit and receive part ...

398 0.0

ETHERNET 1G PCS IP Ethernet 1G PCS core is compliant with IEEE Standard 802.3.2018 Ethernet specification. Through its Ethernet compatibility, it provides a simple inter...

399 0.0

AFDX 1G MAC IP AFDX 1G MAC core is a full-featured, easy-to-use, synthesizable design that supports various Ethernet IEEE standards ,ARINC 664 and supports 10/100/10...

400 0.0

ETHERNET 100G MAC IP Ethernet 100G MAC core is compliant with IEEE Standard 802.3.2018 Ethernet specification. Through its Ethernet compatibility, it provides a simple int...