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Industry Articles
How to interface FPGAs to microcontrollers
(Thursday, July 31, 2008)
Surveying the hardware-assisted verification landscape
(Thursday, July 31, 2008)
Boost verification accuracy with low-power assertions
(Thursday, July 31, 2008)
DesignTag: A Thermally Sensed Security Tag to Protect Chip Designs
(Monday, July 28, 2008)
Prototyping with the Spartan-3A DSP starter platform
(Monday, July 28, 2008)
Interactive C-code cleaning tool supports multiprocessor SoC design
(Thursday, July 24, 2008)
How to give crime-fighters a flexible, high-performance edge with programmable logic
(Thursday, July 24, 2008)
Debugging with Cortex-M3 Microcontrollers
(Tuesday, July 22, 2008)
PCI Express goes everywhere
(Monday, July 21, 2008)
Debugging multiprocessor code
(Monday, July 21, 2008)
Low Power Asynchronous Processor With Cordic Co-Processor
(Monday, July 21, 2008)
A configurable FPGA-based multi-channel high-definition Video Processing Platform
(Thursday, July 17, 2008)
How to select an AES solution
(Wednesday, July 16, 2008)
Validation Approaches for a Product Family
(Friday, July 11, 2008)
Achieve PCIe compliance and interoperability in your IP core-based design
(Friday, July 11, 2008)
How to simplify power design development and evaluation for FPGA-based systems
(Thursday, July 10, 2008)
ESL handoff: closer than you think
(Tuesday, July 8, 2008)
Leveraging OCP for Cache Coherent Traffic Within an Embedded Multi-core Cluster
(Monday, July 7, 2008)
SPIRIT IP-XACT Controlled ESL Design Tool Applied to a Network-on-Chip Platform
(Monday, July 7, 2008)
Reducing system complexity by using a single-supply logic-level shifter
(Thursday, July 3, 2008)
FPGA Implementation of DLX Microprocessor With WISHBONE SoC Bus
(Thursday, July 3, 2008)
Generic Driver Model using hardware abstraction and standard APIs
(Monday, June 30, 2008)
Low power design for analog/mixed signal IP
(Monday, June 30, 2008)
Leveraging Virtual Platforms for Embedded Software Validation: Part 2
(Thursday, June 26, 2008)
Straightforward IP Integration with IP-XACT RTL-TLM Switching
(Thursday, June 26, 2008)
Integration of Design-for-Analysis in IC Layout Considerations to meet the Challenges of Shrinking Technology
(Monday, June 23, 2008)
Lower voltage next goal for low-power DDR
(Monday, June 23, 2008)
Single Flow for Interconnecting IP
(Monday, June 23, 2008)
Keeping the best audio quality in mobile phone by managing voltage drops created by 217 Hz transients
(Thursday, June 19, 2008)
Leveraging virtual hardware platforms for embedded software validation
(Monday, June 16, 2008)
Advanced Techniques for IP Design and Verification
(Monday, June 16, 2008)
eTBc: A Semi-Automatic Testbench Generation Tool
(Thursday, June 12, 2008)
Mobile DDR spurs low-cost, low-power automotive electronics designs
(Thursday, June 12, 2008)
Analysis: Altera jumps to 40 nm with Stratix IV
(Monday, June 9, 2008)
Bridging the Gap Between Silicon and Software Validation
(Monday, June 9, 2008)
Mixed-Signal Verification for USB 2.0 Physical Layer IP
(Monday, June 9, 2008)
Enhance circuit timing design with programmable clock generators (Part 2 of 2)
(Thursday, June 5, 2008)
Floating-point emulation: faster than hardware?
(Thursday, June 5, 2008)
Leveraging Design Insight for Intelligent Verification Methodologies
(Monday, June 2, 2008)
Xilinx responds to Altera's FPGA benchmarks
(Monday, June 2, 2008)
Adapter Based Distributed Simulation of Multiprocessor SoCs Using SystemC
(Monday, June 2, 2008)
NV memory beyond floating gateNV memory innovators
(Thursday, May 29, 2008)
How to perform meaningful benchmarks on FPGAs from different vendors
(Thursday, May 29, 2008)
ESL Methods for Optimizing a Multi-media Phone Chip
(Wednesday, May 28, 2008)
Tips on using CPLDs to reduce system processor power consumption
(Tuesday, May 27, 2008)
Design Challenges Drive Need for New Routing Architecture
(Tuesday, May 27, 2008)
Re-Use of Verification Environment for Verification of Memory Controller
(Tuesday, May 27, 2008)
An MDE Approach For Implementing Partial Dynamic Reconfiguration In FPGAs
(Thursday, May 22, 2008)
How to design portable handsets using CPLDs
(Thursday, May 22, 2008)
Debugging a Shared Memory Problem in a multi-core design with virtual hardware
(Thursday, May 22, 2008)
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