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Industry Articles
Antenna Effect in 16nm Technology Node
(Monday, June 29, 2020)
Analog and Power Management Trends in ASIC and SoC Designs
(Monday, June 29, 2020)
Where Innovation Is Happening in Geolocation. Part 1: Signal Processing
(Thursday, June 25, 2020)
SamurAI: a 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15,000x Peak-to- Idle Power Reduction, 207ns Wake-up Time and 1.3TOPS/W ML Efficiency
(Wednesday, June 24, 2020)
GRSCRUB: FPGA Configuration Supervisor
(Monday, June 15, 2020)
A guide to accelerating applications with just-right RISC-V custom instructions
(Monday, June 8, 2020)
Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR
(Monday, June 8, 2020)
Breaking new energy efficiency records with advanced power management platform
(Monday, June 8, 2020)
How to Verify Complex RISC-V-based Designs
(Monday, June 1, 2020)
Time-Domain Analog Design: Why and How
(Monday, June 1, 2020)
Accelerating 5G virtual RAN deployment
(Friday, May 29, 2020)
Why Do We Need SERDES?
(Monday, May 25, 2020)
RoT: The Foundation of Security
(Monday, May 18, 2020)
Reduce ATPG Simulation Failure Debug Time by Understanding and Editing SPF
(Monday, May 11, 2020)
5 Tips for Creating a Custom ASIC
(Tuesday, May 5, 2020)
Build Trust in Silicon: A Myth or a Reality?
(Monday, May 4, 2020)
Automating C test cases for embedded system verification
(Wednesday, April 29, 2020)
Why Software is Critical for AI Inference Accelerators
(Wednesday, April 29, 2020)
Methodology to reduce Run Time of Timing/Functional Eco
(Monday, April 27, 2020)
Embedded Software Unit Testing with Ceedling
(Tuesday, April 14, 2020)
The Thriving Silicon IP Business
(Monday, April 6, 2020)
SRAM PUF: A Closer Look at the Most Reliable and Most Secure PUF
(Monday, April 6, 2020)
NeoPUF, A Reliable and Non-traceable Quantum Tunneling PUF
(Tuesday, March 31, 2020)
Understanding Physical Unclonable Function (PUF)
(Monday, March 23, 2020)
Shift Power Reduction Methods and Effectiveness for Testability in ASIC
(Monday, March 16, 2020)
Improving performance and security in IoT wearables
(Thursday, March 12, 2020)
Internal JTAG - A cutting-edge solution for embedded instrument testing in SoC: Part 2
(Monday, March 9, 2020)
Strategy To Fix Register-to-Register Timing For large Feedthrough Blocks Having Limited Internal Pipelines
(Thursday, March 5, 2020)
Testing Embedded MRAM IP for SoCs
(Monday, March 2, 2020)
SRAM PUF is Increasingly Vulnerable
(Wednesday, February 19, 2020)
Layout versus Schematic (LVS) Debug
(Monday, February 10, 2020)
Choosing the Right IP for Die-to-Die Connectivity
(Monday, February 3, 2020)
Interface Timing Challenges and Solutions at Block Level
(Monday, January 27, 2020)
Setup Margin Aware Quick Hold Fixing
(Monday, January 13, 2020)
Securing Smart Connected Homes with OTP NVM
(Monday, January 6, 2020)
Understanding Shmoo Plots and Various Terminology of Testers
(Monday, January 6, 2020)
Why the Memory Subsystem is Critical in Inferencing Chips
(Monday, December 23, 2019)
Enabling security in embedded system using M.2 SSD
(Monday, December 16, 2019)
Formal-based methodology cuts digital design IP verification time
(Wednesday, December 11, 2019)
Internal JTAG - A cutting-edge solution for embedded instrument testing in SoC: Part 1
(Monday, December 9, 2019)
Pyramid Vector Quantization and Bit Level Sparsity in Weights for Efficient Neural Networks Inference
(Thursday, November 28, 2019)
Enabling Bluetooth Out-of-Band pairing through NFC
(Monday, November 18, 2019)
Advantages and Challenges of Designing with Multiple Inferencing Chips
(Thursday, November 14, 2019)
Towards Self-Driving Cars: MIPI D-PHY Enabling Advanced Automotive Applications
(Friday, November 8, 2019)
Data Over Sound: Encryption is Key
(Monday, October 28, 2019)
Designing AI enabled System with SOTIF (Safety Of The Intended Functionality)
(Monday, October 21, 2019)
PUF: A Crucial Technology for AI and IoT
(Monday, October 14, 2019)
IP Security Assurance Standard
(Thursday, October 3, 2019)
Implementing Secure Boot in Your Next Design
(Thursday, October 3, 2019)
How to Design SmartNICs Using FPGAs to Increase Server Compute Capacity
(Thursday, September 26, 2019)
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