Design & Reuse
390 IP
251
0.118
USB 2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process
USB 2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process...
252
0.118
USB 2.0 On-The-Go PHY; UMC 28nm HPC+ RVT Logic Process
USB 2.0 On-The-Go PHY; UMC 28nm HPC+ RVT Logic Process...
253
0.118
USB 2.0 On-The-Go PHY; UMC 40nm Logic LP/RVT Low-K Process
USB 2.0 On-The-Go PHY; UMC 40nm Logic LP/RVT Low-K Process...
254
0.118
USB 2.0 OTG Controller IP, Support On-The-Go (Level 3), Soft IP
high speed/full speed/low speed USB On-The-Go (level 3) controller with full host function....
255
0.118
USB 2.0 OTG PHY IP, OTG, UMC 0.11um HS/AE process
USB 2.0 OTG PHY, UMC 0.11um HS AL Logic process....
256
0.118
USB 2.0 OTG PHY IP, OTG, UMC 0.11um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.11um HS/FSG Logic process....
257
0.118
USB 2.0 OTG PHY IP, OTG, UMC 0.153um Logic process
USB OTG 2.0 PHY, UMC 0.153um Logic process....
258
0.118
USB 2.0 OTG PHY IP, UMC 0.11um HS/AE process
USB 2.0 OTG PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process....
259
0.118
USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process....
260
0.118
USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process....
261
0.118
USB 2.0 OTG PHY IP, UMC 0.13um LL/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um LL process....
262
0.118
USB 2.0 OTG PHY IP, UMC 0.18um eFlash/G2 process
USB2.0 OTG PHY, UMC 0.18um E-flash process....
263
0.118
USB 2.0 OTG PHY IP, UMC 0.18um eFlash/G2 process
USB2.0 OTG PHY, UMC 0.18um eFlash process....
264
0.118
USB 2.0 OTG PHY IP, UMC 0.18um G2 process
USB 2.0 On-The-Go PHY, UMC 0.18um GII Logic RVT/FSG process....
265
0.118
USB 2.0 OTG PHY IP, UMC 0.25um process
USB 2.0 host On-The-Go PHY, UMC 0.25um Logic process....
266
0.118
USB 2.0 OTG PHY IP, UMC 40nm LP process
OTG USB2.0 UMC 40 nm LP/RVT process....
267
0.118
USB 2.0 OTG PHY IP, UMC 55nm eFlash process
USB2.0 OTG PHY, UMC 55nm eFlash process....
268
0.118
USB 2.0 OTG PHY IP, UMC 55nm LP process
USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 55nm LP Low-K Logic process....
269
0.118
USB 2.0 OTG PHY IP, UMC 55nm SP process
OTG USB 2.0 PHY (VDT and ID are included in PHY), UMC 55nm SP Low-K Logic process....
270
0.118
USB 2.0 OTG PHY IP, UMC 65nm LL process
USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 65nm low leakage RVT Low-K process....
271
0.118
USB 2.0 OTG PHY IP, UMC 65nm LP process
USB2.0 OTG PHY (VDT and ID are included in PHY), UMC 65nm LP/RVT Low-K Logic process....
272
0.118
USB 2.0 OTG PHY IP, UMC 65nm SP process
USB2.0 OTG (VDT and ID are included in PHY), UMC 65nm SP/HVT Low-K process....
273
0.118
USB 2.0 OTG PHY IP, UMC 90nm LL process
USB2.0 OTG PHY, UMC 90nm LL Low-K -RVT process 2.5V OD 3.3V....
274
0.118
USB 2.0 OTG PHY IP, UMC 90nm SP process
USB2.0 OTG PHY, UMC 90nm SP/RVT/ Low-K process....
275
0.118
USB 3.0 Device PHY IP, Non-Crystal mode support, UMC 40nm LP process
Crystal-less USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process....
276
0.118
USB 3.0 OTG PHY IP, UMC 0.11um HS/AE process
USB3.0 PHY, UMC 0.11um HS/AE Logic process....
277
0.118
USB 3.0 OTG PHY IP, UMC 0.11um HS/FSG process
USB3.0 PHY, UMC 0.11um HS/FSG (Cu) Logic process....
278
0.118
USB 3.0 OTG PHY IP, UMC 0.13um HS/FSG process
USB3.0 OTG PHY, UMC 0.13um HS/FSG Logic process....
279
0.118
USB 3.0 OTG PHY IP, UMC 40nm LP process
USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process....
280
0.118
USB 3.0 OTG PHY IP, UMC 55nm SP process
USB3.0 PHY, UMC 55nm SP/RVT Low-K Logic process....
281
0.118
USB 3.0 OTG PHY IP, UMC 90nm SP process
USB 3.0 Transceiver, UMC 90nm SP/RVT Low-K Logic process....
282
0.118
USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process
USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process...
283
0.118
USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process
USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process...
284
0.118
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process, without internal power clamping circuit
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process, without internal power clamping circuit...
285
0.118
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic e-Flash Process
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic e-Flash Process...
286
0.118
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic Low Power Low-K Process
USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic Low Power Low-K Process...
287
0.118
USB2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process_x005F_x005F_x005F_x005F_x005F_x000D_ cost down from FZOTG266HJ0C_A
USB2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process cost down from FZOTG266HJ0C_A...
288
0.118
USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF
USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF...
289
0.118
USB3.0 OTG controller with AXI interface, support Host, Peripheral and OTG function
USB3.0 OTG controller with AXI interface, support Host, Peripheral and OTG function...
290
0.118
Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process.
Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process....
291
0.0
PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 12SF+/SF++
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4.3 interface spec. Lo...
292
0.0
SD4.1 UHS- II PHY IP
SD4.1 UHS-II IP utilizes distinctive SerDes technology to attain a speed of 312MB/s for UHS-II while maintaining low power consumption. This PHY IP is...
293
0.0
High Speed Access & Test IP USB Version
High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...
294
0.0
MIPI M-PHY Designed For TSMC 28nm
ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A...
295
0.0
USB 1.1 Device Controller IP
USB 1.1 Device Controller IP is based on the latest USB 1.1 specification from USB Implementer Forum (USB-IF) and is compatible with the latest xHCI 1...
296
0.0
USB 1.x Device IP
USB 1.x Device interface provides full support for the USB1.x synchronous serial interface, compatible with USB 1.1 specification. Through its USB1.x ...
297
0.0
USB 2.0 Device Controller IP
We provide highly configurable USB 2.0 device controller IP Cores. Our host, device, and hub offerings are silicon realized and USB-IF certified by ou...
298
0.0
USB 2.0 Host (xHCI) Controller IP
We provide highly configurable and scalable USB 2.0 host/ device/dual-mode controller IP Cores for a wide range of applications. The USB 2.0 controlle...
299
0.0
USB 2.0 OTG Dual Role Device
The Arasan USB 2.0 OTG DRD IP Core is compliant with the OTG Supplement Rev. 1.0a. The USB 2.0 OTG DRD core supports the Host Controller, Device Contr...
300
0.0
USB 2.0 PHY for Samsung 7LPP
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...