1 100.0

HDMI 2.1 Forward Error Correction (FEC) Receiver The HDMI Forward Error Correction (FEC) Receiver IP Core implements Reed-Solomon FEC and symbol de-interleaving/de-mapping as specified by the HDMI 2....

2 100.0

VESA DisplayPort 1.4 RX IP Subsystem for Xilinx FPGAs ...

3 100.0

VESA DisplayPort 2.0 FEC RX The DisplayPort Forward Error Correction (FEC) Receiver IP Core implements Reed-Solomon FEC and symbol interleaving as specified by the VESA DisplayPo...

4 80.0

LDPC Encoder/Decoder (LDPC) Mobiveil’s LDPC Encoder / Decoder* is a flash reliability solution delivering industry-leading flash endurance and retention through advanced LDPC err...

5 50.0

Viterbi Decoder Viterbi decoders are commonly used to decode convolutional codes in communications systems. This Viterbi Decoder is a fully parallel implementation wh...

6 40.0

LDPC Decoder for 5G NR and Wireless Mobiveil's 5G NR LDPC Decoder IP Core offers a robust solution for LDPC decoding, featuring a dedicated LDPC decoder block for optimal performance. It...

7 35.0

5G LDPC Encoder / Decoder TC5200 is an efficient LDPC encoder/decoder Core solution fully compliant with 3GPP NR (5G) specifications. The Core is fully validated and has been s...

8 35.0

5G Polar encoder/decoder TC5300 is an efficient Polar encoder/decoder Core solution compliant with 3GPP NR (5G) specifications. The Core is fully validated and has been select...

9 30.0

LDPC Encoder / Decoder Nand Flash write cycles are limited. An ECC detects and corrects failed operations, increasing the lifetime of the Nand Flash memory. For Nand Flash-b...

10 30.0

LTE turbo decoder TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs. Its unique pipe-line architecture enables to reach very high clock frequen...

11 25.0

LDPC Encoder / Decoder for 3GPP 5G NR Our LDPC encoding and decoding IP for the 3GPP New Radio uplink and downlink data channel includes the entire processing chain, to provide quick and e...

12 25.0

Polar Encoder / Decoder for 3GPP 5G NR Our patented polar encoding and decoding IP for the 3GPP New Radio uplink and downlink includes the entire processing chain, to provide quick and easy...

13 20.0

DVB-S2 LDPC Decoder IP In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Dens...

14 20.0

DVB-S2X LDPC BCH Decoder and Encoder IP Core The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2 design fo...

15 20.0

DVB-S2 LDPC BCH Decoder and Encoder IP Core The DVB-S2 LDPC-BCH block is a powerful FEC (Forward Error Correction) subsystem for Digital Video Broadcasting via Satellite....

16 20.0

BCH Encoder / Decoder The IP-Maker BCH Encoder/Decoder is full featured, easy to use into FPGA and SoC designs. To be easily integrated with the system interface, the IP co...

17 16.0

8b/10 Decoder The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium. It ensures enough state tr...

18 13.0

Reed Solomon Decoder CYB-RS-de core implements the Reed Solomon decoding algorithm and is parameterized in terms of bits per symbol, maximum codeword length and maximum nu...

19 13.0

Reed Solomon Encoder CYB-RS-en core implements the Reed Solomon encoding algorithm and is parameterized in terms of bits per symbol, maximum codeword length and maximum nu...

20 10.0

Reed-Solomon Decoder Reed-Solomon (RS) decoder is ideal for correcting errors that occur in clusters. Clustered bit errors are usual when there is frequency selective fadi...

21 10.0

DVB-T2 Demodulator and LDPC/ BCH Decoder IP Core The demodulator is designed to be used together with an RF tuner, and an analog to digital converter. The system has an internal state machine to cont...

22 10.0

CCSDS AR4JA LDPC Decoder & Encoder IP Core AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3 and 3/4). To obtain hi...

23 10.0

LTE/NR Small Block Lengths Decoder TC5390 is a decoder IP Core compliant with the small block lengths coding scheme for UCI as defined by 3GPP 4G-LTE and 5G-NR specifications. A single ...

24 10.0

Reed Solomon Erasure Code Zero latency, low gate count, low power, asynchronous Reed Solomon Code based Erasure code for RAID FEC: The whole operation of encoding and decodi...

25 10.0

Reed Solomon Error Correcting Code ECC RS Code Statistics for different values of `$mm` `$tt` Zero latency, low gate count, low power, asynchronous Reed Solomon Code based Error correct...

26 10.0

BCH Error Correcting Code ECC BCH code statistics for different `$mm` `$tt` Zero latency, low gate count, low power, asynchronous BCH Code based Error Correction FEC: T...

27 10.0

LDPC for 5G DVBS2 802.11 Encoder: - Every H-matrix (out of 102, 51 for BG1, and 51 for BG2 in 5G) has its encoder, which is just a bunch of XOR gates and co...

28 10.0

DVB-S2X decoder TC4000 is fully compliant with DVB-S2 and DVB-S2X specifications, covering modulations up to 256APSK. It performs I/Q demapping, Block deinterleaver, ...

29 10.0

NR-5G Polar Decoder and Encoder IP Core The Forward Error Correction (FEC) sub-system is one of the essential basing blocks in any communication systems so a powerful FEC code is needed. The...

30 5.0

DVB-S2X Wideband LDPC BCH Decoder IP Core The DVB-S2X Wideband LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2 ...

31 5.0

FireCode FEC Zero latency, asynchronous, low power , low gate count FireCode FEC. It detects and corrects 11 bits of burst errors in 2112 bits of received codew...

32 5.0

Hamming Code ECC The RTL is configurable for number of message bits that need ECC protection. Once RTL is generated it is fixed. 1- RTL has no RAMS/ROMS/Flip Flop...

33 5.0

Viterbi decoder for 3GPP WCDMA and 3GPP-LTE TC2000 is a flexible Viterbi decoder covering LTE, 3GPP WCDMA and WiMAX 16e/m specifications. Throughput range achieved : 100 to 200 Mbits/s. LTE rate...

34 5.0

DVB-S2X FEC encoder The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud). The Core implements a very efficient parallel architecture ...

35 5.0

LTE Cat-0 turbo decoder TC1770 is a IoT-optimized turbo decoder Core compliant with LTE Cat-0 / Cat-M (release 12 and release 13). This Core incorporates LTE rate matching an...

36 4.0

Reed Solomon Decoder IP Core A high performance, fully configurable Reed Solomon Decoder IP Core that is intended for use in a wide range of applications requiring forward error c...

37 4.0

Reed Solomon Encoder IP Core A high performance, fully configurable Reed Solomon Encoder IP Core that is intended for use in a wide range of applications requiring forward error c...

38 4.0

Configurable Reed Solomon Decoder Highly configurable Reed Solomon Decoder compliant with the requirements of nearly all modern standards using Reed-Solomon error correction....

39 4.0

Configurable Reed Solomon Encoder A fully configurable Reed Solomon Encoder compliant with the requirements of nearly all modern standards that use Reed-Solomon error correction....

40 4.0

Configurable Viterbi Decoder Highly configurable Viterbi Decoder compliant with the requirements of nearly all modern standards using Viterbi error correction....

41 4.0

Highly Integrated Reed Solomon Codec ntRSC_IESS core is a highly integrated solution implementing a time-domain Reed-Solomon Forward Error Correction algorithm. The core supports several ...

42 4.0

Configurable Turbo Product Codec In channel coding redundancy is inserted in the transmitted information bit-stream. This redundant information is used in the decoder to eliminate the...

43 4.0

Fully Configurable LDPC Encoder In channel coding redundancy is inserted in the transmitted information bit-stream. This redundant information is used in the decoder to eliminate the...

44 3.0

100 Gbit/s IEEE 802.3bj RS Encoder and Decoder IEEE 802.3bj was developed in response to the rapid growth of server, network and internet traffic. The standard meets the need for higher data rates ...

45 3.0

2.3 Gbit/s DOCSIS 3.1 Downstream LDPC Decoder (PLC, NCP, Data) Data Over Cable Service Interface Specification (DOCSIS) is an international telecommunications standard that permits the addition of high-bandwidth d...

46 3.0

Wideband DDC The Creonic Wideband Digital Down Converter (DDC) digitally converts the input signal at IF frequency down to baseband by multiplying input samples wi...

47 3.0

DVB-RCS2 Modulator The Creonic DVB-RCS2 modulator is a low-complexity high-performance solution that allows for symbol rates of up to 160 MSymb/s on state-of-the-art FPG...

48 3.0

Generic Polar FEC Codec Creonic has flexible Polar decoder architecture to fulfil different customer requirements. The IP core has been demonstrated on internal conferences...

49 3.0

Fixed-Point AWGN Channel The Creonic AWGN Channel IP is a noise generator capable of processing up to a maximum of 512 symbols in parallel. The IP was developed with the aim o...

50 3.0

DVB-S2 BCH and LDPC Encoder and Decoder DVB-S2 (Digital Video Broadcast - Satellite 2nd Generation) is an ETSI standard of the second generation for digital data transmission via satellites....