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• Orca Launches ORC5000 Platform for Low-Power ASIC Designs (Tuesday, March 7, 2023)
• Samsung Foundry, Anaflash partner on embedded flash memory (Monday, March 6, 2023)
• Weebit Nano ReRAM IP now available in SkyWater Technology's S130 process (Monday, March 6, 2023)
• Weebit Nano partners with University of Florida's Nino Research Group to examine effects of radiation on Weebit ReRAM (Monday, March 6, 2023)
• Sondrel extends multi-year, multi-million dollar EDA license with Synopsys (Monday, March 6, 2023)
• Tata Consultancy Services and Renesas Partner to Open Innovation Center to Develop Next-Generation Semiconductor Solutions (Sunday, March 5, 2023)
• OPENEDGES Announces LPDDR5X/5/4x/4 PHY Tapeout at 7nm process node (Sunday, March 5, 2023)
• Intel expands ecosystem with quantum computing SDK (Thursday, March 2, 2023)
• HDL Design House has opened New design center in Nis - Serbia (Wednesday, March 1, 2023)
• Floadia Completes eFlash IP Qualification on TSMC 130BCD plus Process and Achieves the World's Highest Data Retention for 10 Years at 200°C (Wednesday, March 1, 2023)
• Omni Design Technologies Awarded ISO 9001 Certification (Tuesday, February 28, 2023)
• Avery Design Debuts CXL Validation Suite (Monday, February 27, 2023)
• Mixel MIPI D-PHY IP Integrated into Teledyne e2v's new Topaz CMOS Image Sensors (Monday, February 27, 2023)
• MIPI Alliance Welcomes Google as a Promoter Member (Monday, February 27, 2023)
• Truechip Announces Early Adopter Version of Sub-System Verification IP (Monday, February 27, 2023)
• Agile Analog announces first customisable, process agnostic, 12-bit ADC IP (Monday, February 27, 2023)
• India's Chip Designers To Get Access To State-Of-The-Art Tools At Newly Launched ChipIN Centre At C-DAC Bengaluru (Sunday, February 26, 2023)
• IC'ALPS announces successful physical implementation of a demo-chip designed for Weebit Nano's ReRAM technology (Sunday, February 26, 2023)
• MIPI M-PHY 4.1 IP, UFS 3.1 Controller IP & Unipro 1.8 Controller IP Cores are available for instant licensing to support your total UFS applications (Sunday, February 26, 2023)
• EQUALITY consortium selected by the EU's Horizon Europe Program to develop quantum algorithms for industrial applications (Wednesday, February 22, 2023)
• Veriest Solutions to Present Two Verification Papers at DVCon US Conference (Tuesday, February 21, 2023)
• Pushing the System-in-Package Concept Into the Future (Tuesday, February 21, 2023)
• Low power PLL for short-range mmwave industrial radar (Monday, February 20, 2023)
• Non-Volatile Memory: What Will 2023 Bring? (Monday, February 20, 2023)
• Weebit Nano to demonstrate new silicon at Embedded World 2023 (Sunday, February 19, 2023)
• Verification IP for chiplet designs (Friday, February 17, 2023)
• Industry First PCI Express® 6.0 and CXL Interposer Improves Data Captures for Speeds up to 64 GT/s (Monday, February 13, 2023)
• The Value of Semiconductor Packaging Technology in the Era of Heterogeneous Integration (Wednesday, February 8, 2023)
• ShortLink AB joins X-FAB's Design & Supply Chain Partner Network and IP Portal (Tuesday, February 7, 2023)
• AI-designed Chips Reach Scale with First 100 Commercial Tape-outs Using Synopsys Technology (Monday, February 6, 2023)
• DVB-RCS2 Turbo Decoder and Encoder IP Core Available For Integration From Global IP Core (Sunday, February 5, 2023)
• Peripheral IPs with proven automotive compatibility are instantly licensable for extremely reliable performance. (Sunday, February 5, 2023)
• 4 articles CIOs should read about open source in 2023 (Tuesday, January 31, 2023)
• Rambus ups DDR5 data rate and bandwidth by 33% (Tuesday, January 31, 2023)
• Siemens advances integrated circuit verification with new, data-driven Questa Verification IQ software (Monday, January 30, 2023)
• Faraday Announces Multi-site Manufacturing Support in ASIC (Monday, January 30, 2023)
• 10-bit 3Msps Ultra low power SAR ADC IP core for Wireless Communication and Automotive SoCs is available for immediate licensing (Sunday, January 29, 2023)
• BoW Strengthens Pathway to Chiplet Standardization (Wednesday, January 25, 2023)
• Axiomise Accelerates Formal Verification Adoption Across the Industry (Wednesday, January 25, 2023)
• Cadence Quantus FS Solution, a 3D Field Solver, Achieves Certification for Samsung Foundry's SF4, SF3E and SF3 Process Technologies (Wednesday, January 25, 2023)
• Best FPGA (Field-Programmable Gate Arrays) Companies in 2023 (Tuesday, January 24, 2023)
• OpenLogic by Perforce and the Open Source Initiative Release 2023 State of Open Source Report (Tuesday, January 24, 2023)
• Open Compute Project Foundation and JEDEC Announce a New Collaboration (Tuesday, January 24, 2023)
• Avery Design Systems and CoMira Announce Partnership To Enable UCIe-Compliant Chiplet Design (Tuesday, January 24, 2023)
• Semiconductor Companies Create Building Block for Chiplet Design (Monday, January 23, 2023)
• AI Compute Company Banks on Chiplets for Future Processors (Monday, January 23, 2023)
• Startup raises funds to advance neutral atoms quantum computing (Monday, January 23, 2023)
• Swedish quantum computer boost for industry (Sunday, January 22, 2023)
• Scaling Up Quantum Computing by Interconnecting Quantum Processors (Sunday, January 22, 2023)
• Accellera Announces the Formation of the Clock Domain Crossing Working Group (Sunday, January 22, 2023)