Search News

Design Platform News

• Codasip adopts Siemens' OneSpin tools for formal verification (Monday, May 2, 2022)
• GbE (10/100/1000Base-T) PHY IP Cores with matching 1G Ethernet MAC, PCS and TSN MAC Controller IP Cores for all your high-speed Ethernet Networking applications is available for immediate licensing (Sunday, May 1, 2022)
• VLAB Works enables Embedded Applications with VLAB VDMs (Sunday, May 1, 2022)
• (R)evolution in I3C? (Wednesday, April 27, 2022)
• Arasan Announces its eMMC 5.1 Total IP Solution for 5nm SoC Designs (Wednesday, April 27, 2022)
• 16G Multiprotocol Serdes IP Core with different Interface protocols for your High-Speed interconnect requirements in 28HPC+ process technology is available for immediate licensing (Sunday, April 24, 2022)
• JESD204B Tx & Rx SerDes IP Core (12.5Gbps & 16Gbps) in 28HPC+ and 40LL process technologies for High-Speed Serial Interface with Matching Controller IP Core is available for immediate licensing (Monday, April 18, 2022)
• MOSCHIP Announces High Speed Serial Trace Probe (HSSTP) PHY With Link Layer in 6nm (Sunday, April 17, 2022)
• Renesas Introduces Industry's First PCIe Gen6 Clock Buffers and Multiplexers (Wednesday, April 13, 2022)
• Synopsys Study Highlights Challenges with Managing Open Source Risk in Software Supply Chains (Wednesday, April 13, 2022)
• SiemensÂ’ New mPower Digital Solution Now Certified for GlobalFoundriesÂ’ Platforms (Tuesday, April 12, 2022)
• Photonic quantum computer made in Germany (Monday, April 11, 2022)
• New Cadence High-Speed Ethernet Controller IP Family Enables Silicon-Proven Ethernet Subsystem Solutions up to 800Gbps (Monday, April 11, 2022)
• Cadence Spectre FX FastSPICE Simulator Is Adopted by SK Hynix to Accelerate DRAM Design (Sunday, April 10, 2022)
• CFX announces commercial availability of anti-fuse OTP technology on 28HV process (Sunday, April 10, 2022)
• Weebit Nano demo chips integrating its embedded ReRAM module successfully complete functional testing phase (Wednesday, April 6, 2022)
• Sondrel warns that packaging lead time have dramatically increased from 8 to more than 50 weeks (Wednesday, April 6, 2022)
• Sondrel warns that packaging lead times have jumped to more than 50 weeks (Tuesday, April 5, 2022)
• New Arm-based cloud services from Microsoft highlight the power of choice in computing (Monday, April 4, 2022)
• MIPI UFS Controller, MIPI Unipro Controller and MIPI M-PHY IP Cores available in different Fabs and Nodes for all High-density Flash Storage applications in advanced SoCs (Monday, April 4, 2022)
• M31 Speeds Delivery of Silicon IP by 5X Using the Cadence Library Characterization Solution in the Cloud (Wednesday, March 30, 2022)
• Faraday Launches Cortex-A53-based Platform to Accelerate FinFET SoC Development (Wednesday, March 30, 2022)
• ARIES Embedded Presents New MCXL Reference IP Design (Wednesday, March 30, 2022)
• Synopsys Launches Industry's First Broad-Scale Cloud SaaS Solution to Transform Chip Development Landscape (Tuesday, March 29, 2022)
• Edgewater Wireless selects CMC Microsystems as fabrication services Partner (Monday, March 28, 2022)
• Advancing VHDL's Verification Capabilities with VHDL-2019 Protected Types (Monday, March 28, 2022)
• Introducing DDR5/DDR4/LPDDR5 Combo PHY IP Core, Silicon Proven in 12FFC for Next-Gen High performance SoCs is available for immediate licensing (Sunday, March 27, 2022)
• Cadence Selected by Microsoft for RAMP Phase II Program (Wednesday, March 23, 2022)
• CEA and Startup C12 Join Forces to Develop Next-Generation Quantum Computers with Multi-Qubit Chips at Wafer Scale (Wednesday, March 23, 2022)
• O-RAN Fronthaul Transport Subsystem is now available (Wednesday, March 23, 2022)
• Avalanche Technology and Efabless Partner for System-On-Chip Development using Google's Open-Source Program (Monday, March 21, 2022)
• Xylon Demonstrates Hot Swapping of Programmable FPGA/SoC Chip Parts (Wednesday, March 16, 2022)
• Intrinsic ID Optimizes SRAM PUF Security Technology for Advanced Process Nodes with QuiddiKey 4.x (Wednesday, March 16, 2022)
• Synopsys Improves Interoperability Between CODE V and LightTools (Monday, March 14, 2022)
• Zepp Health signs licence agreement for sureCore's EverOn ultra-low voltage memory IP (Wednesday, March 9, 2022)
• OPENEDGES Announces Silicon Proven 12nm LPDDR54 PHY IP (Wednesday, March 9, 2022)
• Arasan announces the immediate availability of its MIPI D-PHY IP as Tx Only or Rx Only for the GlobalFoundries 12nm FinFET process node (Tuesday, March 8, 2022)
• Synopsys Extends OptoCompiler Support for New GF Fotonix Platform (Sunday, March 6, 2022)
• PCIe 5.0 SerDes PHY and Controller IP Cores for all High-End Serial connect Interfaces in advanced SoCs is available for immediate licensing (Sunday, March 6, 2022)
• Agile Analog's Approach to Analog IP Design and Quality — Why "Silicon Proven" is NOT What You Think (Thursday, March 3, 2022)
• Dolphin Design chooses DEFACTO's SoC Compiler 9.0: a turnkey methodology to reduce project costs and increase team efficiency (Wednesday, March 2, 2022)
• Sondrel explains the 10 steps to model and design a complex SoC (Tuesday, March 1, 2022)
• USB 3.1 Device & Host Controller IP Cores with highly configurable design for Superspeed data transfers in all kinds of advanced SoCs is available for immediate licensing (Sunday, February 27, 2022)
• Cadence and Dassault Systemes Partner to Transform Electronic Systems Development (Wednesday, February 23, 2022)
• MIPI D-PHY Tx IP Core in 22nm along with MIPI DSI-2 Tx Controller IP Core for your High-End Camera and Display needs is available for immediate licensing (Sunday, February 20, 2022)
• We are now AS 9100D certified! - Logic Fruit Technologies (Sunday, February 20, 2022)
• Berkeley Lab Unveils ASIC Chip Failure Bypass System (Wednesday, February 16, 2022)
• Faraday Succeeds in Factory Automation ASIC (Wednesday, February 16, 2022)
• Synopsys to enable secure software development (Sunday, February 13, 2022)
• SMIC Outpaces Rivals on Strong Local Demand (Saturday, February 12, 2022)