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Design Platform and Service News

• Why China is betting big on chiplets (Monday, February 5, 2024)
• Movellus Recognized by Frost & Sullivan for Improving System Performance and Optimizing Power with Its Aeonic™ IP Portfolio (Monday, February 5, 2024)
• Eliyan Breaks Chiplet Memory Wall With Standard Packaging (Sunday, February 4, 2024)
• NoC configuration tool takes makes complex SoC design easier (Sunday, February 4, 2024)
• AccelerComm Launches PUSCH Channel Simulator for 5G L1 Performance Evaluation (Sunday, February 4, 2024)
• Nordic Semiconductor and Arm reaffirm partnership with licensing agreement for latest low power processor designs, software platforms, and security IP (Sunday, February 4, 2024)
• Cadence Unveils Millennium Platform - Industry's First Accelerated Digital Twin Delivering Unprecedented Performance and Energy Efficiency (Thursday, February 1, 2024)
• Europe's home-grown processor (Tuesday, January 30, 2024)
• Satisfy Your Chiplet Craving at the Chiplet Summit (Tuesday, January 30, 2024)
• Alphawave Semi and Teledyne LeCroy Unveil PCIe 7.0 Signal Generation and Measurement (Tuesday, January 30, 2024)
• Nubis Communications and Alphawave Semi Showcase First Demonstration of Optical PCI Express 6.0 Technology (Tuesday, January 30, 2024)
• Alphawave Semi and proteanTecs Collaborate to Provide System Insights and Analytics for Custom Silicon and Chiplets (Monday, January 29, 2024)
• Silvaco Joins GaN Valley™, a Wide Bandgap Semiconductor Innovation Ecosystem in Europe (Sunday, January 28, 2024)
• INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with Siemens' advanced analog and mixed-signal EDA technology (Sunday, January 28, 2024)
• T2M-IP Unveils Best-Selling DVB-T2/T Demodulator IP Core with Cutting-Edge Features, Silicon Proven and Ready to License (Sunday, January 28, 2024)
• SoC design: When a network-on-chip meets cache coherency (Tuesday, January 23, 2024)
• Keysight Introduces Chiplet PHY Designer for Simulating D2D to D2D PHY IP Supporting the UCIe™ Standard (Tuesday, January 23, 2024)
• Siemens brings thermal digital twin technology to the electronics supply chain (Monday, January 22, 2024)
• Sondrel completes a multi-billion transistor chip design at 5nm (Monday, January 22, 2024)
• Menta exhibits at Chiplet Summit and presents its new scalable chiplet platform, MOSAICS-LP (Monday, January 22, 2024)
• Cadence Unveils New Palladium Z2 Apps with Industry's First 4-State Emulation and Mixed-Signal Modeling to Accelerate SoC Verification (Thursday, January 18, 2024)
• How Synopsys' acquisition of Ansys could streamline design and simulation (Tuesday, January 16, 2024)
• proteanTecs Launches Power Reduction Solution for High Performance Markets (Monday, January 15, 2024)
• Chiplet Makers Expect to Disrupt Incumbents (Monday, January 15, 2024)
• High-bandwidth memory (HBM) options for demanding compute (Sunday, January 14, 2024)
• Unveiling Sonata: Affordable CHERI Hardware for Embedded Systems (Sunday, January 14, 2024)
• Unveiling a Cutting-Edge 12-bit 5Msps SAR ADC IP Core - Industry-Leading Features, Silicon Proven, and Available for Licensing Now (Sunday, January 14, 2024)
• Chip wars: How 'chiplets' are emerging as a core part of China's tech strategy (Friday, January 12, 2024)
• [CES 2024] Samsung to continue investing in HBM in 2025 (Thursday, January 11, 2024)
• GUC Tapes Out Complex 3D Stacked Die Design on Advanced FinFET Node Using Cadence Integrity 3D-IC Platform (Tuesday, January 9, 2024)
• CXL Overcomes Hierarchical Routing Limits (Tuesday, January 9, 2024)
• Atmosic Introduces the Multiprotocol ATM34/e Series Adding 802.15.4 Support for Thread and Matter to its Bluetooth LE Portfolio (Tuesday, January 9, 2024)
• Thalia's AMALIA qualified on 12nm FinFET technology (Monday, January 8, 2024)
• GUC Taped Out UCIe 32G IP using TSMC's 3nm and CoWoS Technology (Monday, January 8, 2024)
• Comcores JESD204D IP core confirming to the Revision D of the JESD204 standard released in Dec'2023 now available (Sunday, January 7, 2024)
• Creonic GmbH Joins the Science and Innovation Alliance Kaiserslautern (Sunday, January 7, 2024)
• OPENEDGES Achieves ISO9001: 2015 Certification, Proving IP Quality for its Customers (Sunday, January 7, 2024)
• DisplayPort v1.4 Tx PHY and Controller IP Cores which is Silicon proven in 12nm technology and also production proven is available for Worldwide instant licensing (Sunday, January 7, 2024)
• Faraday Collaborates in Arm Total Design to Provide Arm Neoverse CSS-based Design Services (Wednesday, January 3, 2024)
• M31 Successfully Validates 12nm USB4 PHY IP Empowering Next-Generation High-Speed Data Transmission (Tuesday, January 2, 2024)
• Ventana Microsystems Drives India's Chiplet Innovation in 2024 (Monday, January 1, 2024)
• Ventana Microsystems Drives India's Chiplet Innovation in 2024 (Monday, January 1, 2024)
• ELECTRA IC Marks a Decade of Design and Verification Excellence at CES 2024 (Monday, January 1, 2024)
• Accelerate Innovation: Harnessing the Speed of Tomorrow with PCIe Gen 4 PHY and Controller IP Cores (Monday, January 1, 2024)
• PCIe 6.0 moves closer to arriving in the market in 2024: Alphawave demonstrates interoperability (Thursday, December 28, 2023)
• U.K. Conference Accelerates Post-Quantum Cryptography Standards Review Process (Thursday, December 28, 2023)
• Rambus Advances Data Center Server Performance with Industry-First Gen4 DDR5 RCD (Wednesday, December 27, 2023)
• Europe Aims for Leadership Role in Quantum Computing (Monday, December 25, 2023)
• Quantum predictions for 2024 (Wednesday, December 20, 2023)
• Siemens collaborates with sureCore and Semiwise to pioneer quantum computing ready cryogenic semiconductor designs (Tuesday, December 19, 2023)