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RISC-V News

• Universal AI RISC-V processor does it all - CPU, GPU, DSP, FPGA (Wednesday, November 20, 2024)
• Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC (Sunday, November 17, 2024)
• RISC-V for HPC at SC24 (Friday, November 15, 2024)
• What RISC-V Means for the Future of Chip Development (Tuesday, November 12, 2024)
• Arteris and MIPS Partner on High-Performance RISC-V SoCs for Automotive, Datacenter and Edge AI (Monday, November 11, 2024)
• lowRISC and SCI Semiconductor Partner to Create First CHERIoT Commercial Tapeout (Monday, November 11, 2024)
• CHERI builds global chip security alliance (Monday, November 11, 2024)
• Tenstorrent to Build Japanese Engineering Talent with US-Based AI and RISC-V Training (Monday, November 4, 2024)
• 4 Highlights From the RISC-V Summit North America (Monday, October 28, 2024)
• SCI Semiconductor announces Global-First CHERI enabled devices and Early Access Program (Wednesday, October 23, 2024)
• First CHERI RISC-V embedded chip and Early Access Programme (Tuesday, October 22, 2024)
• RISC-V reaches milestone with RVA23 profile ratification (Tuesday, October 22, 2024)
• Andes Technology Unveils the D45-SE RISC-V Processor Targeting ASIL-D Certification (Monday, October 21, 2024)
• DeepComputing and Andes Technology Partner to Develop the World's First RISC-V AI PC with 7nm QiLai SoC, Featuring Ubuntu Desktop (Monday, October 21, 2024)
• DeepComputing and Andes Technology Partner to Develop the WorldÂ’s First RISC-V AI PC with 7nm QiLai SoC, Featuring Ubuntu Desktop (Monday, October 21, 2024)
• Fractile Licenses Andes Technology's RISC-V Vector Processor as It Builds Radical New Chip to Accelerate AI Inference (Monday, October 21, 2024)
• RISC-V Announces Ratification of the RVA23 Profile Standard (Monday, October 21, 2024)
• Andes Announces the AndesCore™ 46-Series Family and the 3rd generation Vector Processor AX46MPV with Matrix Extension (Sunday, October 20, 2024)
• Andes Announces the AndesCore™ AX66 supporting RVA23, Multi-cluster, Hypervisor and Android (Sunday, October 20, 2024)
• Arteris and SiFive Deliver Pre-verified Solution for the Datacenter Market (Sunday, October 20, 2024)
• Codasip enables secure Linux by donating CHERI RISC-V SDK to the CHERI Alliance (Sunday, October 20, 2024)
• SiFive HiFive Premier P550 Development Boards Now Shipping (Sunday, October 20, 2024)
• The role of RISC-V in the European Processor Initiative - Interview with Roger Espasa (Thursday, October 17, 2024)
• Codasip unveils versatile automotive-grade embedded RISC-V core (Monday, October 14, 2024)
• Kernkonzept and Lauterbach Make Virtualized RISC-V Systems Possible (Sunday, October 13, 2024)
• Flexible RISC-V processor offers prospect of low-cost smart objects (Sunday, September 29, 2024)
• Codeplay Brings RISC-V Support to the oneAPI Construction Kit (Sunday, September 22, 2024)
• VyperCore plans 5nm RISC-V server chip and card (Sunday, September 22, 2024)
• SiFive Highlights Key Inflection Points Driving RISC-V Adoption for AI and Introduces Intelligence XM Series for AI Workload Acceleration (Tuesday, September 17, 2024)
• Andes core wins control slot in Rivos' RISC-V SoC (Monday, September 16, 2024)
• SEALSQ Adopts RISC-V the Open-Standard RISC-V Architecture; Achievement Aligns with Rising Global Demand for Edge-AI and Machine Learning Applications (Thursday, September 12, 2024)
• Advancing AI the Brazilian Way: Fostering Innovation Through Collaboration and Open Standards (Sunday, September 8, 2024)
• Semidynamics on major recruitment drive for RISC-V software engineers (Sunday, September 8, 2024)
• Two Indian startups showcase innovations at Semicon Taiwan 2024 (Wednesday, September 4, 2024)
• RISC-V Builds the Backbone of Three New Consumer Devices (Tuesday, September 3, 2024)
• SiFive and Arkmicro Accelerate RISC-V Adoption in Automotive Electronics with SiFive's Automotive IP for the High-end SoC Market (Sunday, September 1, 2024)
• STMicroelectronics joins Quintauris to boost RISC-V adoption (Sunday, September 1, 2024)
• SEALSQ RISC-V Semiconductors is Pioneering Sustainability Through Decentralized Processing (Thursday, July 11, 2024)
• RISC-V Thrives Through Research, International Collaboration (Tuesday, July 9, 2024)
• Addressing AI While Keeping the MIPSiness In MIPS (Sunday, July 7, 2024)
• How RISC-V is changing the server market (Wednesday, July 3, 2024)
• RISC-V Summit Europe News - Processor IP, Verification Tools, and More (Thursday, June 27, 2024)
• RISC-V in Space Workshop in Gothenburg on April 2-3, 2025! (Sunday, June 23, 2024)
• Ventana CEO to Deliver a Keynote at RISC-V Summit Europe (Sunday, June 23, 2024)
• Andes Technology Showcases Leadership in AI and Automotive Applications at RISC-V Summit Europe 2024 (Thursday, June 20, 2024)
• Breker Verification Systems Readies RISC-V CoreAssurance and SoCReady SystemVIP for Automated, Certification-level RISC-V Verification Coverage (Wednesday, June 19, 2024)
• Slide Shows Samsung May be Developing a RISC-V CPU for In-memory AI Chip (Tuesday, June 18, 2024)
• Initial members join CHERI Alliance to drive adoption of memory safety and scalable software compartmentalization (Sunday, June 16, 2024)
• Codasip Claims 'Best-in-Class' RISC-V Core for Power-Conscious Designs (Friday, June 14, 2024)
• Axiomise Heads to RISC-V Summit Europe June 25-27 in Munich (Wednesday, June 12, 2024)