Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
Subscribe to D&R SoC News Alert
English
Mandarin
Register
Login
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Subscribe to D&R SoC News Alert
Register
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
Search News
Keyword
Category
Foundry
Chiplet / Multi-Die
Design IP
RISC-V
Artificial Intelligence
Automotive
Internet of Things
Security
Networking
Audio / Video
RISC-V News
StarFive to release open source single board platform Q3 2021
(Tuesday, August 3, 2021)
SiFive speeds up RISC-V U74 cores as Canaan unveils a 3-TOPS Kendryte K510
(Monday, August 2, 2021)
NSITEXE Announces a RISC-V 32bit CPU supporting ISO26262 ASIL D
(Sunday, August 1, 2021)
Collaboration looks to accelerate functional safety development for RISC-V
(Sunday, August 1, 2021)
The 2021 RISC-V Summit to Co-Locate with the 58th Design Automation Conference (DAC) in San Francisco
(Tuesday, July 27, 2021)
Is RISC-V the Future?
(Monday, July 26, 2021)
Agile Analog joins RISC-V International as a strategic member
(Monday, July 19, 2021)
CAES Receives Contract from Vinnova to Advance High Performance RISC-V Space Computing
(Monday, July 19, 2021)
Russia To Build RISC-V Processors for Laptops: 8-core, 2 GHz, 12nm, 2025
(Tuesday, July 13, 2021)
RISC-V based XiangShan processor poses another threat to Intel
(Monday, July 12, 2021)
Aldec launches its first RISC-V PolarFire FPGA emulation board
(Tuesday, July 6, 2021)
Open source XiangShan RISC-V processor could eventually challenge ARM Cotex-A76
(Sunday, July 4, 2021)
SiFive Deepens RISC-V Core Lineup
(Tuesday, June 29, 2021)
Imperas Expands Partnership with Valtrix to Address Growing RISC-V Verification Market
(Tuesday, June 29, 2021)
SiFive Collaborates with Imperas on Models of SiFive's RISC-V Core IP Portfolio
(Monday, June 28, 2021)
StarFive Adopts Valtrix STING for Verification of Next-generation RISC-V Processors
(Tuesday, June 22, 2021)
IAR Systems extends development tools performance capabilities for Andes RISC-V cores
(Tuesday, June 22, 2021)
SEGGER and Codasip Announce Cooperation on RISC-V
(Tuesday, June 22, 2021)
Codasip Announces A71X RISC-V Application Core with Dual-Issue Capability
(Monday, June 21, 2021)
SiFive Performance P550 Core Sets New Standard as Highest Performance RISC-V Processor IP
(Monday, June 21, 2021)
€8m project for Europe's first RISC-V supercomputer chip
(Thursday, June 17, 2021)
Semiconductor Industry: Interest Strengthening in RISC-V
(Sunday, June 13, 2021)
Cortus hopes to stake early RISC-V HPC claim
(Sunday, June 13, 2021)
AndesBoardFarm Enables SoC Designers to Explore RISC-V Processors in Online FPGA Board Collection
(Tuesday, June 8, 2021)
RISC-V FPGA SoM module starts production
(Monday, June 7, 2021)
Bluespec, Inc. Joins the Xilinx® Partner Program, Offering Drop-in Ready RISC-V Processors for Xilinx FPGAs.
(Tuesday, May 11, 2021)
Dialog Semiconductor Selected as SiFive Preferred Power Management Partner for RISC-V Development Platforms
(Monday, May 10, 2021)
Scaleable RISC-V module for distributed AI processing
(Sunday, May 2, 2021)
Domain specific accelerators for RISC-V
(Sunday, April 25, 2021)
Codasip Announces FPGA Evaluation Platforms for RISC-V Processor Cores
(Tuesday, April 20, 2021)
Renesas and SiFive Partner to Jointly-Develop Next-Generation High-End RISC-V Solutions for Automotive Applications
(Tuesday, April 20, 2021)
RISC-V vs. ARM vs. x86 – What's the difference?
(Monday, April 12, 2021)
Codasip Releases a Major Upgrade of Its Studio Processor Design Toolset with a Tutorial RISC-V core
(Monday, April 12, 2021)
RISC-V Star Rises Among Chip Developers Worldwide
(Tuesday, April 6, 2021)
SiFive and DARPA collaborate to bring the power of RISC-V to Technology Innovation
(Wednesday, March 31, 2021)
Intel's tilt to foundry opens a door to upstart RISC-V technology
(Monday, March 22, 2021)
Valtrix and Codasip Cooperate on Verification of RISC-V Systems
(Monday, March 22, 2021)
Japanese AI processor firm picks Risc-V for partner CPU
(Wednesday, March 17, 2021)
MIPS, China's Loongson CPU Are Both Going All-in on RISC-V
(Sunday, March 14, 2021)
EPI EPAC1.0 RISC-V core boots Linux on FPGA
(Monday, March 8, 2021)
Codasip Announces Commercial Add-ons to SWeRV Core EH1
(Monday, March 8, 2021)
Wait, What? MIPS Becomes RISC-V
(Sunday, March 7, 2021)
IAR unveils certified edition of its development toolchain for RISC-V
(Thursday, March 4, 2021)
Wanxiang Blockchain Forms RISC-V International Blockchain SIG with Ecosystem Partners
(Wednesday, March 3, 2021)
IAR Systems announces availability of RISC-V development tools with certification for IEC 61508 and ISO 26262
(Wednesday, March 3, 2021)
RISC-V Fast Tracks Simpler Extensions
(Monday, March 1, 2021)
RISC-V International Unveils Fast Track Architecture Extension Process and Ratifies ZiHintPause Extension
(Tuesday, February 23, 2021)
Micro Magic, Inc. Delivers Ultra Low Power 64-Bit RISC-V Core
(Wednesday, February 17, 2021)
The Promise & Pitfalls of Open Hardware Development
(Tuesday, February 16, 2021)
RISC-V Processor Designs Emerge
(Wednesday, February 3, 2021)
|
Previous
|
13
|
14
|
15
|
...
|
Next
|
Did you miss last D&R News Alerts ?