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RISC-V News

• ProvenRun and SiFive deliver RISC-V-based secure Trusted Execution Environment (TEE) (Wednesday, March 8, 2023)
• Blueshift Memory to use Codasip custom compute to develop new memory-efficient processor technology (Wednesday, March 8, 2023)
• Tiempo Secure announces TESIC RISC-V Secure Element IP and development kit (Tuesday, March 7, 2023)
• Andes Technology's N25F RISC-V Processor Enables Superior Immersive Scenarios for ASPEED Technology's Powerful Image Stitching SoC AST1230 (Monday, March 6, 2023)
• DCD Presents RISC-V, Automotive & Cyber during Embedded World 2023 (Sunday, March 5, 2023)
• 2023 a Breakout Year for RISC-V (Sunday, March 5, 2023)
• CAST Enhances RISC-V Processor Line for Low-Power and Functional Safety Applications (Thursday, March 2, 2023)
• Arteris and SiFive Partner to Accelerate RISC-V SoC Design of Edge AI Applications (Monday, February 27, 2023)
• 32bit RISC-V certified ISO 26262 ASIL-D ready by TÜV SGS (Monday, February 27, 2023)
• Imperas Collaborates with Synopsys on SystemVerilog based RISC-V Verification (Sunday, February 26, 2023)
• Ventana Micro Selects Imperas Solutions for RISC-V Processor Verification (Wednesday, February 22, 2023)
• embedded world 2023: Codasip presents on custom compute and RISC-V design (Wednesday, February 15, 2023)
• Andes And IAR Systems Together Enable Leading Vendor ILITEK To Accelerate The Development Of Its ISO 26262 Ready TDDI SoC ILI6600A (Tuesday, February 14, 2023)
• A closer look at security verification for RISC-V processors (Sunday, February 12, 2023)
• Andes Technology: Stepping into the 18th Year with Perseverance and Proud Accomplishments (Thursday, February 9, 2023)
• Could RISC-V become a force in high performance computing? (Tuesday, February 7, 2023)
• Could RISC-V become a force in high performance computing? (Tuesday, February 7, 2023)
• Intel Terminates RISC-V Development Project: What Happened? (Monday, January 30, 2023)
• NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space Missions (Sunday, January 29, 2023)
• Intel kills its RISC-V Pathfinder development kit programme (Sunday, January 29, 2023)
• Nexperia invests in sustainable alternatives to batteries (Monday, January 23, 2023)
• Andes Technology Collaborates with LDRA to Deliver Integrated Tool Suite for Safety-Critical Software on Andes RISC-V CPU Solutions (Wednesday, January 18, 2023)
• Risc-V MCUs have 8 to 20 pins (Monday, January 16, 2023)
• Andes Unveils Details of its Entry Level D23 RISC-V Processor Core (Wednesday, January 11, 2023)
• Bluespec collaborates with Synopsys to address growing verification demands for RISC-V design community (Tuesday, January 10, 2023)
• RISC-V SBC VisionFive 2 Officially Shipped (Monday, January 9, 2023)
• Quad-core Risc-V development board with 3D GPU in Pico-ITX (Monday, January 9, 2023)
• MIPS Rolls Out Its First RISC-V Processor Core – It's a Big 'Un (Sunday, January 8, 2023)
• €270m for RISC-V chiplets to build European exascale supercomputers (Wednesday, January 4, 2023)
• SpacemiT makes important breakthroughs in RISC-V High-Performance Cores (Wednesday, January 4, 2023)
• Ventana Introduces CES Audience to World's Highest Performance RISC-V CPU, Veyron V1 (Wednesday, January 4, 2023)
• Google announces official Android RISC-V support (Tuesday, January 3, 2023)
• RISC-V Summit 2022: All Your CPUs Belong to Us (Monday, January 2, 2023)
• RISC-V Summit 2022: All Your CPUs Belong to Us (Monday, January 2, 2023)
• RISC-V chip to drive next generation app store of hearables (Monday, January 2, 2023)
• Efinix® Releases Efinity® RISC-V Embedded Software IDE (Monday, December 19, 2022)
• IP architect Tariq Kurd wins the RISC-V Contributor Award (Sunday, December 18, 2022)
• New CAES, IAR Systems Partnership Brings NOEL-V Support to IAR Embedded Workbench (Wednesday, December 14, 2022)
• Imagination extends its commitment to RISC-V with an upgrade to Premier level membership (Wednesday, December 14, 2022)
• Codasip Lead IP Architect chosen for the RISC-V Contributor Award (Wednesday, December 14, 2022)
• Ventana Introduces Veyron, World's First Data Center Class RISC-V CPU Product Family (Wednesday, December 14, 2022)
• Solutions Disclosed at RISC-V Summit: Security, Verification, and More (Wednesday, December 14, 2022)
• Examining the Top Five Fallacies About RISC-V (Tuesday, December 13, 2022)
• XMOS announces software-defined SoC platform now compatible with RISC-V (Monday, December 12, 2022)
• LeWiz released RISC-V with OmniXtend clustering technology to open source. (Monday, December 12, 2022)
• Breker Verification Systems Unveils Easy-To-Adopt Integrity FASTApps Targeting RISC-V Processor Core, SoC Verification Scenarios (Monday, December 12, 2022)
• NSITEXE Qualifies Imperas RISC-V Reference Models for Akaria Processors NS72A, NS72VA, and NS31A (Monday, December 12, 2022)
• Siemens pioneers commercial grade Linux support for the RISC-V architecture (Monday, December 12, 2022)
• RISC-V arrives in data centre league (Monday, December 12, 2022)
• Microchip Showcases RISC-V-Based FPGA and Space-Compute Solutions at RISC-V Summit (Sunday, December 11, 2022)