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Thursday, January 23, 2025

• SoC design: What's next for NoCs?
• Chiplet Summit 2025 Nods to a Bright Future for Disaggregated Computing

Thursday, January 23, 2025

• Andes Announces the AndesCoreâ„¢ AX66 supporting RVA23, Multi-cluster, Hypervisor and Android

Wednesday, January 22, 2025

• Synopsys to Hold Annual User Group Conference and Inaugural Executive Forum March 19-20 in Silicon Valley
• EU funding new chip to solve quantum computing roadblocks
• Tiny RISC-V chip for the digital product passport (DPP)
• Synopsys to Hold Annual User Group Conference and Inaugural Executive Forum March 19-20 in Silicon Valley
• ARM boost in $100bn Stargate data centre project
• Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
• VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
• Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety

Wednesday, January 22, 2025

• China's second-largest foundry hires former Intel executive to lead advanced node development
• Can Photonics Keep Moore's Law Alive?
• GlobalFoundries to create new silicon photonics facility

Tuesday, January 21, 2025

• MIPI Alliance Announces Board Leadership Appointments
• MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
• Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
• Alphawave Semi Q4 2024 Trading and Business Update
• ST-GloFo fab plan shelved

Tuesday, January 21, 2025

• Alphawave Semi shares rise on record-breaking quarter

Monday, January 20, 2025

• Synopsys, NXP, and Infineon Drive Focus on Software-Defined Vehicles
• Support added in RISC-V IP for automotive high safety and security applications
• Intel Foundry gains new defense clients for 18A process
• Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
• Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
• Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
• Credo to Exhibit at Chiplet Summit 2025
• PQShield announces participation in NEDO program to implement post-quantum cryptography across Japan
• YorChip announces patent-pending Universal PHY for Open Chiplets
• Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
• Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
• Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
• Credo to Exhibit at Chiplet Summit 2025
• PQShield announces participation in NEDO program to implement post-quantum cryptography across Japan
• YorChip announces patent-pending Universal PHY for Open Chiplets

Sunday, January 19, 2025

• Modulation, manipulation, precision: spatial light modulators for industry and research
• Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
• BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura's Cyberthreat Intelligence Tool
• Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella
• High-Performance 16-Bit ADC and DAC IP Cores Ready to licence
• Altera Launches New Partner Program to Accelerate FPGA Solutions Development
• Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
• BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura's Cyberthreat Intelligence Tool
• Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella
• High-Performance 16-Bit ADC and DAC IP Cores Ready to licence
• Altera Launches New Partner Program to Accelerate FPGA Solutions Development
• High-Performance 16-Bit ADC and DAC IP Cores Ready to licence
• Altera Launches New Partner Program to Accelerate FPGA Solutions Development

Friday, January 17, 2025

• Nvidia teams up with TSMC in silicon photonics development
• Nvidia teams up with TSMC in silicon photonics development

Thursday, January 16, 2025

• Commerce Department Finalizes CHIPS Act Awards, Adds $75M for GlobalFoundries Expansion
• TSMC refuses to make Samsung Exynos: no surprise
• Progressing on Track: PCIe 7.0 Specification, Version 0.7 Now Available for Member Review
• Alchip opens 3DIC ASIC design services
• QuickLogic to Exhibit at Chiplet Summit 2025
• European 1nm, photonics chip pilot lines launch
• GlobalFoundries Announces New York Advanced Packaging and Photonics Center
• TSMC refuses to make Samsung Exynos: no surprise
• Progressing on Track: PCIe 7.0 Specification, Version 0.7 Now Available for Member Review
• Alchip opens 3DIC ASIC design services
• QuickLogic to Exhibit at Chiplet Summit 2025
• European 1nm, photonics chip pilot lines launch
• GlobalFoundries Announces New York Advanced Packaging and Photonics Center

Wednesday, January 15, 2025

• Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
• CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research
• Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
• CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research
• Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
• InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
• CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
• RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research

Tuesday, January 14, 2025

• Fraunhofer IZM is powering the evolution of chiplet technologies as part of the APECS pilot line
• The inevitable opportunity for photonics In quantum computing
• European regulator approves Synopsys' $35bn Ansys acquisition after companies agree to divest software assets
• Fraunhofer IZM is powering the evolution of chiplet technologies as part of the APECS pilot line
• The inevitable opportunity for photonics In quantum computing
• European regulator approves Synopsys' $35bn Ansys acquisition after companies agree to divest software assets
• European regulator approves Synopsys' $35bn Ansys acquisition after companies agree to divest software assets

Tuesday, January 14, 2025

• Vertical Compute, a new imec spin-off, raises €20 million to Revolutionize the Future of AI Computing

Monday, January 13, 2025

• QuickLogic Signs Agreement with Magenta to Expand Distribution Network to Turkiye and UAE
• Samsung reportedly to cut NAND production
• CES 2025: Automotive suppliers focus on software and safety
• Ultra Accelerator Link™ Consortium (UALink™) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• MZ Technologies Unveils Next Generation Chiplet/Package Design Tool
• € 20m for imec MRAM in-memory compute chiplet spinout
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• QuickLogic Signs Agreement with Magenta to Expand Distribution Network to Turkiye and UAE
• Samsung reportedly to cut NAND production
• CES 2025: Automotive suppliers focus on software and safety
• Ultra Accelerator Link™ Consortium (UALink™) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• MZ Technologies Unveils Next Generation Chiplet/Package Design Tool
• € 20m for imec MRAM in-memory compute chiplet spinout
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• QuickLogic Signs Agreement with Magenta to Expand Distribution Network to Turkiye and UAE
• Samsung reportedly to cut NAND production
• CES 2025: Automotive suppliers focus on software and safety
• Ultra Accelerator Link™ Consortium (UALink™) Welcomes Alibaba, Apple and Synopsys to Board of Directors
• MZ Technologies Unveils Next Generation Chiplet/Package Design Tool
• € 20m for imec MRAM in-memory compute chiplet spinout
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?
• Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
• YorChip and ChipCraft announce low-cost, high-speed 200Ms/s ADC Chiplet
• Creonic Introduces Doppler Channel IP Core
• RISC-V in AI and HPC Part 2: Per Aspera Ad Astra?

Monday, January 13, 2025

• Europe's technology trends for 2025
• Foundry Giants' Advanced Node Expansion Efforts Beyond 2025: TSMC, Intel, Rapidus and More

Sunday, January 12, 2025

• SIA Statement on Biden Administration Action Imposing New Export Controls on AI Chips
• Imagination pulls out of RISC-V CPUs
• BrainChip Brings Neuromorphic Capabilities to M.2 Form Factor
• NASA Awards Alphacore Four Contracts for Radiation Hardened Microelectronics Innovation
• TSMC December 2024 Revenue Report
• Exostiv Labs Unveils AMD Versal Adaptive SoC Device Support for Exostiv and Exostiv Blade Platforms
• Synopsys Responds to the European Commission Approving its Proposed Acquisition of Ansys in Phase 1
• Alphacore's Digital CMOS Impulse Ground-Penetrating Radar (GPR) Transceiver ASIC