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Wednesday, November 24, 2021

• WiLAN Subsidiary Acquires Wired Connectivity Patent Portfolio
• North American Semiconductor Equipment Industry Posts October 2021 Billings
• GPU shipments increase year-over-year in Q3
• SynSense and Prophesee partner to combine neuromorphic engineering expertise for developing one-chip event-based smart sensing solution for ultra-low power edge-AI
• Samsung Selects Texas as Site for $17 Billion Fab
• Siemens receives three 2021 TSMC OIP Partner of the Year awards for next-generation design enablement
• The Democratization of Chip Design
• AMIQ EDA Joins OpenHW Group and Contributes Linting Capabilities for CORE-V Open-Source RISC-V Cores and Testbenches

Tuesday, November 23, 2021

• SC21: Chinese Supercomputer Approaches Quantum Performance
• Samsung set to compete against TSMC with new foundry in US
• Do We Need 6G?
• Samsung choses Austin for $17bn 3nm fab
• VeriSilicon Image Signal Processor IP Achieved ISO 26262 Automotive Functional Safety Certification

Monday, November 22, 2021

• Project to reduce energy use of 5G video streaming
• Microchip Adds Second Development Tool Offering for Designers Using Its Low-Power PolarFire RISC-V SoC FPGA for Embedded Vision Applications at the Edge
• CEVA SensPro Sensor Hub DSP Achieves Automotive Safety Compliant Certification for ASIL B (Random) and ASIL D (Systematic)
• Grovf Inc. Releases Low Latency RDMA RoCE V2 FPGA IP Core for Smart NICs

Sunday, November 21, 2021

• CEA-Leti Spinoff Weaves RFID Chips, Raises €15m in Funding
• Codasip Adopts Imperas for RISC-V Processor Verification
• MediaTek and TSMC Unveil the World's First 7nm 8K Resolution Digital TV System-on-Chip
• Announcing superfast, HD Audio & Video through HDMI 2.0 Tx & Rx PHY & Controller IP Cores uncompressed data transfer in 28HPC+ and 12FFC!
• BrainChip Partners with MegaChips to Develop Next-Generation Edge-Based AI Solutions

Saturday, November 20, 2021

• 5 Trends Shaping the Automotive Perception Market

Thursday, November 18, 2021

• CXL Consortium Showcases First Public Demonstrations of Compute Express Link Technology at SC21
• Elmos adopts Arm Cortex-M IP for its next-generation automotive MCU based product family

Wednesday, November 17, 2021

• Reference models for newly ratified RISC-V Specifications
• Samsung Foundry Adopts Cadence Liberate Trio Characterization Suite for 3nm Production Library
• DVB-S2X/S2/S/T2/T/C Combo Demodulator/Decoder IP Cores licensed to America's leading TV Semiconductor Company
• GlobalFoundries, Ford to Address Auto Chip Supply and Meet Growing Demand
• Annual Revenue Growth to Skyrocket Among Top 25
• Imperas Models - reference for the newly ratified RISC-V Specifications
• DCD-SEMI joins CAN in Automation, a leading CAN manufacturers' group
• Imagination Technologies picks advisers for IPO in London or New York
• Synopsys Research Finds Vulnerabilities in 97% of Applications
• Samsung and Its Foundry Partners Reveal Solutions for a Strong Design Infrastructure at 3rd SAFE Forum 2021
• sureCore designs special high performance multi-port memory for Semidynamics AI chip
• Samsung Foundry Adopts New Tempus SPICE-Accurate Aging Analysis for High-Reliability Applications
• UK Widens Probe of Nvidia-Arm Deal
• Access Advance Welcomes ZTE as a Licensor and Licensee of the HEVC Advance Patent Pool

Tuesday, November 16, 2021

• Samsung's pick for 2nd foundry fab in US seems imminent
• A Testament of IP Leadership
• Cadence Characterization Suite Enables Samsung Foundry to Get to Market Faster
• Siemens extends support of multiple IC design solutions for Samsung Foundry's latest process technologies
• Synopsys 3DIC Compiler Qualified for Samsung Foundry's Multi-Die Integration Flow, Accelerating 2.5D and 3D Designs
• Synopsys Full EDA Flow First to Achieve Samsung Foundry 4LPP Process Certification
• RISC-V Low-Power Embedded Processor IP Core Now Available from CAST
• Renesas Enters FPGA Market with the First Ultra-Low-Power, Low-Cost Family Addressing Low-Density, High-Volume Applications

Tuesday, November 16, 2021

• Digital Blocks DB9000 TFT LCD and OLED Display Controller & Processor IP Application Leadership Advancements

Monday, November 15, 2021

• SMIC Vows to Triple 300-mm Production Capacity Despite U.S. Sanctions
• Intrinsic ID and Rambus Raise the Bar for Hardware Security with Integration of PUF Technology and Rambus Root of Trust
• Arteris IP Helps Automate System-on-Chip Semiconductor Design Traceability with Harmony Trace Design Data
• BBright UHD Media Gateway integrates intoPIX JPEG XS technology
• Faraday Announces Proven MIPI D-PHY for Samsung Foundry 14LPC Process
• Analog Bits to Demonstrates Low Latency PCIe/CXL Gen 5 on Samsung 8nm at SAFE Forum 2021

Sunday, November 14, 2021

• Is the Spec for Vehicle Automation Levels a Dead End?
• Soitec's quality focus on RF-SOI wafers wins UMC's "Outstanding Supplier Award"
• IAR Systems enables next generation automotive applications with NXP's S32K3 MCU family
• Xilinx Launches Alveo U55C, Its Most Powerful Accelerator Card Ever, Purpose-Built for HPC and Big Data Workloads
• eDisplay Port / Display Port v1.4 Tx PHY and Controller IP Cores is available in 40nm ULP and 12nm FFC for your picture perfect UHD, 8K, 4K Display Applications
• Lattice Acquires Mirametrix
• Floadia Announces eNVM of 150 degree C retention on HHGrace 180BCD
• SMIC Reports 2021 Third Quarter Results
• SMIC Management Shakeup Continues
• BrainChip appoints Sean Hehir as New Chief Executive Officer