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Thursday, May 27, 2021

• Edge AI Inferencing Opens Up New World of Opportunities
• CEA-Leti Introduces Plastic mmWave System for Applications Requiring Ultra-Low Latency and Ultra-High-Speed Connectivity
• Synopsys ports Moortec PVT sensor to 3nm

Wednesday, May 26, 2021

• Synopsys DesignWare PVT Subsystem Drives Performance, Power and Silicon Lifecycle Management on TSMC's N3 Process Technology
• Mirabilis Design and E-Elements Technology team up to provide concept-to-implementation design flow for AI applications
• Siemens launches PCI Express 6.0 Questa Verification IP solution
• Arm battens down the spending hatches
• USB Promoter Group Announces USB Power Delivery Specification Revision 3.1
• DCD-SEMI accelerates AES security with the latest IP Core
• Precise-ITC launches 10G-1.6T Ethernet/FiberChannel/FlexO IP Core
• Silex Insight launches high performance (2Tbps) SM4-GCM Multi-booster
• AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features

Tuesday, May 25, 2021

• 5G Ethernet Subsystem to reduce development time is now available
• Imperas Simulation Reference Models selected by IAR Systems for Arm 64bit
• Intel hangs on to No.1 rank in Q1
• Autonomous imager for smartphones, home appliances and automobiles
• Cadence Unleashes Clarity 3D Solver on the Cloud for Straightforward, Secure and Scalable Electromagnetic Analysis of Complex Systems on AWS
• TSMC accounts for 70% of global contract MCU production
• proteanTecs' UCT to be Exhibited at the TSMC 2021 Online Technology Symposiums for North America, Europe and Taiwan
• Siemens expands Simcenter with AI-driven generative engineering for systems architectures
• Cadence Collaboration with Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs
• eYs3D Microelectronics, Co. Raises $7 Million Series A from Leading Industry Strategic Investors for Vision/AI Chips
• Oracle adds Arm Neoverse-based cloud instances with OCI Ampere A1
• Synopsys Digital and Custom Design Platforms Certified for TSMC's Latest 3nm Process Technology
• Lattice sensAI Solution Stack Simplifies Deployment of AI/ML Models on Smart Edge Devices
• Hardent Joins Samsung SAFE IP Partner Program & Launches New Display IP Subsystem Solution in Collaboration with Rambus

Monday, May 24, 2021

• BrainChip highlights its Akida Neural Processor at AI Field Day 2
• 10 Key Drivers to Transform 5G Adoption
• AI Driving Renewed Interest in Processing-in-Memory
• Arm invests in edge vision startup
• Global 200mm Fab Capacity on Pace to Record Growth to Meet Surging Demand and Address Chip Shortage, SEMI Reports
• Top-15 Semi Companies Log Year-Over-Year Growth of 21% in 1Q21
• Synopsys Enables First-Pass Silicon Success for Early Adopters of Next-Generation Armv9 Architecture-based SoCs
• Avery Design Launches PCI Express 6.0 Verification IP to Enable Early Development, Compliance Checking for New Version of Standard
• PLDA Announces XpressRICH PCI Express 6.0 Controller IP for Next Generation SoC Designs
• Arm Total Compute solutions bring performance, security and Armv9 to the broadest range of Client devices

Sunday, May 23, 2021

• GF foundry deal for 6G RF GaN
• Cadence Announces New Low-Power IP for PCI Express 5.0 Specification on TSMC N5 Process
• Cadence Accelerates Cloud Hyperscale Infrastructure with Third-Generation 112G-LR SerDes IP on TSMC's N5 Process
• U.S. Chip Makers Embrace Collaboration
• GUC Announces GLink-3D Die-on-Die Interface IP using TSMC N5 and N6 Process for 3DFabric Advanced Packaging Technology
• Arm partners are shipping more than 900 Arm-based chips per second based on latest results
• Logic Fruit Technologies Launches ARINC 818 RTL IP Core for Avionics applications
• RISC-V Functional Safety Processor IP Core Introduced by CAST and Fraunhofer IPMS
• JVCKENWOOD Deploys Cadence Spectre FX Simulator and Comprehensive Design Flows to Improve Productivity
• Siemens receives three Samsung Foundry SAFE EDA awards
• Cadence Introduces the Spectre FX FastSPICE Simulator Delivering up to 3X Performance Gains with Superior Accuracy

Saturday, May 22, 2021

• Think Silicon and Ambiq enable IoT devices

Thursday, May 20, 2021

• Now Your Car is a Cybersecurity Risk, Too

Wednesday, May 19, 2021

• Gyrfalcon Showcases AI-X at 2021 Embedded Vision Summit
• TSMC's tech advance builds pressure on Samsung
• LeapMind's "Efficiera" Ultra-low Power AI Inference Accelerator IP Was Verified RTL Design for ASIC/ASSP Conversion
• Efabless Launches chipIgnite with SkyWater to Bring Chip Creation to the Masses
• Silvaco Announces Appointment of Industry Veteran Ernest E. Maddock to Board of Directors
• Credo Announces 3.2Tbps XSR-Enabled High-Speed Connectivity Chiplet with 112Gbps Lane Rates
• Synopsys Posts Financial Results for Second Quarter Fiscal Year 2021
• Lattice Propel Design Environment Supports New RISC-V Processor and IP Cores
• Memory Upswing Returns, New Record High Expected in 2022
• Intrinsic ID Wins InfoSec Award for ‘Next Gen in Embedded Security' - Announced at RSA Conference by Cyber Defense Magazine
• Avery Design Systems and Rambus Extend Memory Model and PCIe VIP Collaboration
• Sony Senior VP & Playstation LSI Leader, Takayasu Muto Joins Secure-IC's Strategic Committee
• Chips&Media Making its Presence at the 2021 Embedded Vision Summit as an Exhibitor
• SEMIFIVE collaborates with Arm to accelerate its custom SoC designs

Tuesday, May 18, 2021

• Global Chip Shortage Expected to Persist Until Q2 2022
• Unisantis unveils Dynamic Flash Memory as DRAM alternative
• Raytheon Technologies and GLOBALFOUNDRIES Partner to Accelerate 5G Wireless Connectivity
• Shift from 8'' Wafer Fabs to 12'' Could Ease IC Shortages
• Quantum Software: What's Next?
• Taiwan's TSMC claims breakthrough on 1nm chips
• Think Silicon and Ambiq Enable Ultra-Low Power IoT Devices with Smartphone-Class, 3D-Like Graphics

Monday, May 17, 2021

• Ambiq shows interest in FinFET, FDSOI and an IPO
• Siemens Acquires Supplyframe
• 48-V Power Architecture for Next-Gen AI Processors
• Nvidia's ownership of ARM could drive customers to RISC-V, says Xilinx CEO.
• Arm and Jülich Sign Multi-Year HPC Collaboration Agreement
• The timeline for quantum computing is getting shorter
• Synopsys unveils breakthrough in emulation performance
• Intrinsic ID's SRAM PUF Deployed by Avnet ASIC Solutions to Secure Advanced SoCs
• Thalia's AMALIA Technology Analyzer de-risks Analog IP reuse for major IP houses and IC manufacturers
• MoSys Announces Optimized P4 Pipeline Support for Stellar Packet Classification Platform IP for FPGAs
• Riviera-PRO Enables VHDL-2019 Users to Unleash the Power of the Language's New Additions
• Aphawave shares remain below offer price
• Siemens accelerates digital marketplace strategy with acquisition of Supplyframe

Sunday, May 16, 2021

• Fab Expansions in South Korea
• South Korea plans US$450 billion semiconductor spend
• Xpeedic On-Chip Passive EM Simulation Suite Certified for Samsung Foundry 8LPP Process Technology
• GOWIN Releases USB 2.0 PHY and Device Controller IP for Their FPGA Products
• SMIC Reports 2021 First Quarter Results
• Agile Analog closes new funding round to go global with revolutionary analog IP technology
• Vidatronic Appoints Jiangsu JITRI Intelligent Integrated Circuit Design as Its Representative for China
• AI Startups Plateau, AI SoCs Soar, and the Edge Diverges