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Thursday, April 29, 2021

• Intel CEO Pat Gelsinger Seeks Support for EU Foundries
• China on way to self reliance in 28-nm chips; to attain maturity in 14-mm category as well
• Thalia Design Automation successfully delivers voltage regulator in a 22nm process node with 45% reduction in design time using its AMALIA software

Wednesday, April 28, 2021

• EnSilica Mixed Signal ASIC is PPAP Approved for Luxury Hybrid Car
• RISC-V International Welcomes Chengwei Capital as a Premier Member
• SiFive and Samsung Foundry Extend Partnership to Accelerate AI SoC Development
• CEVA Lauded by Frost & Sullivan for Addressing the Challenges of Connected Devices with Its Smart Sensing MotionEngine Software
• Fabless Suppliers Held a Record 33% of the 2020 IC Market
• Global Unichip Corporation Deploys Cadence Clarity 3D Solver to Achieve 5X Speedup of Systems Analysis for 112G Long-Reach Network Switch

Tuesday, April 27, 2021

• Cadence collaborates with Arm to accelerate SoC development
• "KI-PREDICT" – Intelligent process monitoring with on-sensor signal preprocessing
• Astera Labs and Avery Design Partner on CXL 2.0 Verification for Smart Retimer Portfolio to Improve Performance in Data-Centric Applications
• Valens Announces Successful Tapeout of First MIPI A-PHY Compliant Chipsets for Long-Reach, Ultra-High-Speed Automotive Connectivity
• Vidatronic Announces Series of Integrated Power Management Unit (PMU) IP Cores Optimized for Augmented/Virtual Reality Applications
• ACL Digital Partners with Mobiveil, High-Speed Silicon IP Platform Leader
• Skyworks to Acquire the Infrastructure & Automotive Business of Silicon Labs
• Achronix and Napatech Partner to Target Data Center Networking
• Arm Leverages Synopsys Fusion Compiler to Enable Best PPA for Latest Neoverse Platforms
• Alphawave IP aims for 100 engineers in UK design center
• Achronix Adopts eMemory IP for FPGA Hardware Root of Trust
• ARM pushes chiplets and 3D packaging for Neoverse chips

Monday, April 26, 2021

• Soitec wins two awards for its employee share ownership schemes Paris Stock Exchange:SOI
• Automotive Ethernet PHY addresses next-gen connected cars
• SiPearl launches the recruitment of 10 engineers per month in France & Germany
• Transforming compute for next-generation infrastructure
• Synopsys and Arm Deliver Comprehensive Solutions to Increase Performance and Accelerate Time-to-Market for High-Performance Computing, Data Center and AI SoCs
• Lattice and Rambus to Partner on Next-Generation Security Solutions
• BitSim and NOW Electronics joins forces BitSim
• Tiempo Secure Selects IC'Alps to Accelerate Silicon Implementation of Secure Element IP for IoT Applications
• Silicon Catalyst Announces Six Newly Admitted Companies to Semiconductor Incubator

Sunday, April 25, 2021

• Dialog adds low power Flash devices to IoT Portfolio
• Domain specific accelerators for RISC-V
• TSMC Update: 2nm in Development, 3nm and 4nm on Track for 2022
• Flex Logix Appoints CFO and VP of Inference Hardware to Senior Management Team; Announces Expansion to Austin, TX
• Defacto Technologies Announces SoC Compiler, v9
• Nvidia-ARM deal runs into security issues in the UK
• videantis and Continental sign strategic supplier contract and announce SOPs with videantis-enabled camera system
• Anritsu Corporation Selects PLDA's PCIe Solution for its Next Generation of Handheld Spectrum Analyzers

Thursday, April 22, 2021

• Automakers to Blame for Semiconductor Shortage
• proteanTecs Joins Open Compute Project, Unveils UCT Monitoring System
• Siemens Place-and-route Solution Now Qualified on TSMC's N6 Technology
• Andes Announces the New Upgrade of AndeSight IDE v5.0: a comprehensive software solution to accelerate RISC-V AI and IoT developments
• Alphawave IP plans move to UK for $4.5bn IPO
• Cadence Extends Popular Tensilica Vision and AI DSP IP Product Line with New DSPs Targeting High-End and Always-On Applications
• Vidatronic Appoints Mike Holland as VP of IP Licensing Sales, Positioning Company to Drive Continued Growth
• Seamless Microsystems Announces Highest-Performance ADC for Automotive RADAR
• PCI Express Gen5 PHY & Controller IP Cores available in major Fabs & Foundries for Graphics, Memory and Storage Applications

Wednesday, April 21, 2021

• GF Working with High Profile Universities on 6G Technology
• Tenstorrent Selects SiFive Intelligence X280 for Next-Generation AI Processors
• BrainChip Simplifies Deep Learning with Launch of MetaTF
• EnSilica completes PPAP on safety-critical automotive ASIC design
• Rambus Expands High-Performance Memory Subsystem Offerings with HBM2E Solution on Samsung 14/11nm

Tuesday, April 20, 2021

• Adaptive Power/Performance Management for FD-SOI
• Hardent Selected as Design Services Provider for New Xilinx Kria SOMs
• Codasip Announces FPGA Evaluation Platforms for RISC-V Processor Cores
• Synopsys Introduces PrimeLib Unified Library Characterization and Validation Solution for Accelerated Access to Advanced Process Nodes
• Marvell Completes Acquisition of Inphi
• CAES Gaisler Signs Contract with the European Space Agency for New Advanced Space Processor
• Pinnacle Imaging Systems Announces Denali 3.0 Soft ISP & HDR Sensor Module for New Xilinx Kria SOM Platform and Vision AI Starter Kit
• Renesas and SiFive Partner to Jointly-Develop Next-Generation High-End RISC-V Solutions for Automotive Applications

Monday, April 19, 2021

• proteanTecs Joins TSMC IP Alliance Program
• Synopsys Unleashes PrimeSim Continuum Solution to Accelerate the Design of Hyper-Convergent ICs for Memory, AI, Automotive and 5G Applications
• Xilinx Introduces Kria Portfolio of Adaptive System-on-Modules for Accelerating Innovation and AI Applications at the Edge
• TSMC certifies Aprisa place-and-route solution from Siemens on TSMC's N6 process
• Movellus Launches Maestro Intelligent Clock Network Platform for SoC Designs
• Rambus Joins DARPA Toolbox Initiative with State-of-the-Art Security and Interface IP

Sunday, April 18, 2021

• PLDA Introduces a Complete Line of PCIe IP for USB4, Enabling PCIe Support in USB4 Hubs, Hosts and Devices
• Cadence Pegasus Verification System Certified for Samsung Foundry 5nm and 7nm Process Technologies
• Expedera Introduces Its Origin Neural Engine IP With Unrivaled Energy-Efficiency and Performance
• 2020 Global Semiconductor Equipment Sales Surge 19% to Industry Record $71.2 Billion, SEMI Reports
• TSMC Boosts Capital Budget Again, to $30B
• DSP Concepts Enables Audio Weaver for the Cadence Tensilica HiFi 5 DSP
• Logic Design Solutions Introduces the first NVMe HOST IP on POLARFIRE SoC FPGA