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Thursday, December 10, 2020

• Can China Become Self-reliant in Semiconductors?
• The DDR5 Revolution: Promise & Challenges Ahead
• Daiteq Selected as the First ESA NOEL-V User
• CAST JPEG IP Cores Deliver Outstanding Results in the New High Resolution LXT Cameras by Baumer

Wednesday, December 9, 2020

• Cobham Advanced Electronic Solutions Introduces Support for Wind River VxWorks RTOS for NOEL-V Processor
• TSMC November 2020 Revenue Report
• Achronix Announces Appointment of Mark Voll as New Chief Financial Officer
• Imperas releases new RISC-V Processor Verification IP to drive RISC-V adoption forward with a flexible methodology for all SoC adopters
• Foundry Capex to Account for 34% of Total Semi Capex in 2020
• eMemory & PUFsecurity Announce with UMC the World's First PUF-based Secure Embedded Flash Solution
• Green Hills Software Adds RTOS Support to Its Extensive Product Portfolio for RISC-V-based SoCs
• Renesas Strengthens IP License Portfolio with IP Utilities to Facilitate Device Development

Wednesday, December 9, 2020

• OneSpin Contributes to the OpenHW Ecosystem to Achieve Processor Integrity for the CORE-V CVE4 Open-Source RISC-V Cores

Tuesday, December 8, 2020

• Nvidia has one surprising new rival: the world's largest storage vendor
• Cobham Gaisler and fentISS Deepen Collaboration around RISC-V
• SmartDV Announces New Line of Design IP Controllers for High-Speed Communications
• TSMC wins 2021 IEEE Corporate Innovation Award
• RISC-V International Reports Another Strong Year of Growth with New Technical Milestones, Educational Programs, RISC-V Adoption and More
• Think Silicon Announces a New Scalable Multi-Core GPU Product Suite with Extended Graphics and Video Functionality
• AImotive Deploys Synopsys VCS to Verify Next-Generation Automated Driving Technologies
• Renesas Extends Arm Cortex-Based MCU Family with RA4M3 MCU Group for Industrial and IoT Applications
• Silvaco and OPENEDGES Announce Availability of Integrated DDR Controller and PHY IP Solutions
• Veriest and Kudelski IoT collaborate to accelerate the integration of highly robust silicon security features in IC designs
• Attopsemi Achieves ISO 9001 Certification for IP Quality Management System
• Seagate Designs RISC-V Cores to Power Data Mobility and Trustworthiness
• Lattice Launches 2nd Generation Security Solution with New Mach-NX FPGA for Next Generation, Cyber-Resilient Systems
• Cobham Advanced Electronic Solutions Offers RISC-V Support for Microchip Technology's PolarFire FPGA Devices
• Silicon Labs selects Imperas RISC-V Reference Model for verification
• CHIPS Alliance to Collaborate with RISC-V to Standardize an Open Unified Memory Leveraging OmniXtend
• BrainChip Ships Akida Evaluation Boards
• JEDEC Advances Universal Flash Storage (UFS) Removable Card Standard 3.0

Monday, December 7, 2020

• TSMC's market cap rises to 9th highest in world
• Top 10 Foundry Revenues Expected to Increase by 18% YoY in 4Q20
• UMC to become world's No. 3 foundry: researcher
• Samsung Foundry Adopts Spectre X Simulator for 5nm Design
• Vidatronic Appoints Carnyx Consulting as Its Representative for European Markets
• Codasip announces three new RISC-V Application Processor Cores providing Multi-core and SIMD capability
• UMC Reports Sales for November 2020
• Menta and Andes Announce Partnership Enabling Hardware Reconfiguring for ISA Extension
• OneSpin Contributes to the OpenHW Ecosystem to Achieve Processor Integrity for the CORE-V CVE4 Open-Source RISC-V Cores
• 100G Lambda MSA Announces Release of New Specifications for Longer Reach 100 GbE over Single-Mode Fiber
• C-DAC Selects Valtrix STING For Design Verification Of RISC-V Based Microprocessors
• Menta eFPGA and Codasip Announce Technology Partnership
• Neoverse expands further into cloud with new network-optimized instances at AWS re:Invent

Sunday, December 6, 2020

• U.S. Blacklisting SMIC of China Expected to Reverberate around Korean Foundry Industry
• Imperas Extends free riscvOVPsimPlus Simulator for RISC-V
• Total Revenue of Top 10 Foundries Expected to Increase by 18% YoY in 4Q20 While UMC Overtakes GlobalFoundries for Third Place, Says TrendForce
• China's Semiconductor Progress to Be Impacted Once Again as SMIC Becomes Sanctioned by U.S. Department of Defense, Says TrendForce
• OpenFive Licenses Flex Logix's eFPGA to Develop a Low Power Communications SoC Requiring a Large eFPGA
• Dolphin Design unveil a new and improved version of its Power Controller IP - MAESTRO - to speed-up energy-efficient SoC design
• GUC Monthly Sales Report - Nov 2020
• DRAM Leads in Revenue, NAND With Top Percentage Growth in 2020
• Porting PikeOS to NOEL-V and LEON: SYSGO and Cobham Gaisler Extend Cooperation around RISC-V
• Announcement of SMIC

Thursday, December 3, 2020

• Chip Startups are Succeeding with Silicon Catalyst and Partners Like Arm
• CFX announces commercial availability of anti-fuse OTP technology on Silterra I11L process
• intoPIX delivers its new full stack of TICO-RAW solutions improving RAW image workflows and camera designs
• Codasip announces three new RISC‑V Application Processor Cores providing Multi-core and SIMD capability

Wednesday, December 2, 2020

• RISC-V for ultra-low power processing and AI on the edge
• Synopsys and Samsung Foundry Collaborate to Deliver Fastest Design Closure and Signoff for Process Nodes Down to 3nm
• IAR Systems and GigaDevice extend partnership with powerful Arm solutions
• Esperanto Technologies to Reveal Chip with 1000+ Cores at RISC-V Summit
• Third-Quarter 2020 Global Semiconductor Equipment Billings Surge 30% Year-Over-Year, SEMI Reports
• Can IBM Ecosystem Advance AI Chip Performance 1000x?
• Imperas Simulator Supports Andes Custom Extension to Accelerate Software Development in Domain Specific Applications
• Faster, Smaller and More Accurate Edge AI Using Deeplite and Andes Technology Software + Hardware
• Rockley Photonics Collaborates with Cadence to Create a High-Performance System for Hyperscale Data Centers
• Imec Demonstrates Capacitor-less IGZO-Based DRAM Cell With >400s Retention Time
• Andes RISC-V Vector Processor NX27V Is Upgraded to RVV 1.0
• Embeetle and GigaDevice collaborate to bring a new powerful and simple IDE to ARM and RISC-V based MCUs
• BrainChip Confirms Completion of the Akida Production Design
• Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2020
• Alibaba-Backed Media AI Firm Finds Innovative Applications

Tuesday, December 1, 2020

• 64-bit RISC-V Core Claims to Outperform Apple M1 SoC
• Mobiveil Announces Compute Express Link (CXL) 2.0 Design IP, Successful Completion of CXL 1.1 Validation with Intel's CXL Host Platform
• PCIe Gen5 & PCIe Gen4 Phy IP available in TSMC 12FFC

Monday, November 30, 2020

• China's AI unicorns reveal fatal flaw in rush to go public
• China a step closer to microchip independence
• Infineon to set up global AI hub in Singapore
• Imagination hires Tim Whitfield as new Chief of Engineering
• Bluetooth RF Transceiver Phy KGD for adding Bluetooth Connectivity to "any SoC"
• Secure-IC Announces U.S. Subsidiary Opening
• PLDA Announces the Successful CXL Interoperability with pre-production Intel Xeon CPU, Code Named Sapphire Rapids
• Faraday Leads Industry to Adopt TCFD Framework for Corporate Sustainability
• Xilinx Acquires Assets of Falcon Computing Solutions to Advance Software Programmability and Expand Developer Community

Sunday, November 29, 2020

• IO and multiprotocol processing in highly demanding embedded architectures
• Samsung Electronics Squaring Off with TSMC in Packaging Technology
• RF-SOI Engineered Substrates at the Heart of Modern RF mmWave Front-ends
• TSMC To Fall Behind Both Intel, Samsung By 2024
• Andes Announces New RISC-V Processors: Superscalar 45-Series with Multi-core Support and 27-Series with Level-2 Cache Controller
• Broadcom Debuts Industry's First 5nm ASIC for Data Center and Cloud Infrastructure
• Imagination sells Ensigma Wi-Fi technology to Nordic Semiconductor
• Nordic Semiconductor expands into Wi-Fi by acquiring the entire Wi-Fi development team, core Wi-Fi expertise, and Wi-Fi IP tech assets of Imagination Technologies Group
• Xiphera announces FPGA-based TLS 1.3 IP core for mission-critical applications
• BrainChip Appoints Geoffrey Carrick as Non-Executive Director
• Arteris IP Completes Acquisition of Magillem Design Services Assets, Creating World's Premier System-on-Chip Integration Company