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Thursday, September 11, 2025

• Samsung’s Exynos 2600 Beats Apple's A19 Pro in Shocking Benchmark Upset
• Alibaba, Baidu begin using own chips to train AI models, The Information reports
• Auracast broadcast audio solution powers assistive listening in public spaces with Nordic Semiconductor wireless connectivity
• Valens Semiconductor and Samsung partner to enhance the MIPI A-PHY standard
• ASML, Mistral AI enter strategic partnership
• SiFive's New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center
• IntoPIX JPEG XS Powers Barnfind BarnPalette Flow-XS For Next-Generation Broadcast Workflows
• Deca and Silicon Storage Technology Announce Strategic Collaboration to Enable NVM Chiplet Solutions
• Perceptia Begins Port of pPLL03 to Samsung 8nm Process Technology

Wednesday, September 10, 2025

• Arm Goes for Rebrand for Mobile CSS, Drops Cortex, Immortalis
• TSMC Releases August 2025 Revenue Report
• Nvidia Specializes GPU for First Stage of Transformer Inference
• Smarter, Faster, More Personal AI Delivered on Consumer Devices with Arm's New Lumex CSS Platform, Driving Double-Digit Performance Gains
• ASML partners with Mistral AI on lithography innovation
• Perforce's Delphix AI used in software development to boost speed and security
• Intel 14A node confirmed more expensive than 18A due to High-NA EUV
• BrainChip Appoints James Shields as Vice President of Sales and Business Development
• Cadence Expands Digital Twin Platform Library with NVIDIA DGX SuperPOD Model to Accelerate AI Data Center Deployment and Operations
• Agile Analog announces deal with tier 1 US customer for agileSecureanti-tamper IP

Tuesday, September 9, 2025

• SiFive details second generation RISC-V cores for AI accelerators
• Network on Chip (NOC) IP Core Now Offered Under Whitebox License: Full Source Code, Unlimited Usage, Complete Modification Rights

Monday, September 8, 2025

• China's AI Chip Ambitions Limited by HBM Memory Supply, Notes Report
• Quantinuum Raises $600 Million to Drive Scalable Quantum Computing
• Siemens Joins the CHERI Alliance: a United Front for Cutting-Edge Cybersecurity
• Jmem Tek has achieved NIST CAVP certification, with ASCON algorithm implementation, and will be showcased at SEMICON Taiwan.
• Sarcina pioneers next-generation UCIe-A/S chiplet interconnects for AI systems
• Comcores Launches OmniGate: A Versatile and Compact Hardware Evaluation Platform for TSN Ethernet End Stations, Switches, and Gateways
• IntoPIX Receives 2025 Emmy® Award For The Development Of JPEG XS
• Synopsys and GlobalFoundries Establish Pilot Program to Bring Chip Design and Manufacturing to University Classrooms
• Cadence to Acquire Hexagon's Design & Engineering Business, Accelerating Expansion in Physical AI and System Design and Analysis

Sunday, September 7, 2025

• CG Power to MosChip Technologies: Five semiconductor stocks to watch out for in 2025

Friday, September 5, 2025

• Custom hardware helps deliver safety and security for electric traction
• BrainChip's Cloud Platform Lets Developers Use Its Neuromorphic Tech
• Global IP Core Announces the Availability of the NavIC LDPC/BCH Decoder FEC IP for Immediate Integration
• Gen 5 NVMe Host IP on AGILEX 7 R-Tile !
• Silvaco Names Chris Zegarelli as Chief Financial Officer
• Xiphera Builds Faster and More Secure Data Processing – Business Finland Supports Development
• Leader And IntoPIX Boost IP Stream Monitoring With JPEG XS Integration

Thursday, September 4, 2025

• New MIPI I/O Bridges Working Group - A Conversation with Chair Aruni Nelson
• Signatureip Achieves PCI-SIG® Pcie® 5.0 Certification, Joining Elite Group On Official Integrators List
• Data Patterns (India) Ltd. connects design to manufacturing with software from Siemens Xcelerator
• Time-Sensitive Networking IP Core CAST RANiX Automotive Antenna System
• Synopsys Announces Expanding AI Capabilities for its Leading EDA Solutions
• IntoPIX And Arkona Technologies Double JPEG XS Densityfor Next-Generation IP Broadcast Workflows
• Andes Technology Announces D23-SE: A Functional Safety RISC-V Core with DCLS and Split-Lock for ASIL-B/D Automotive Applications
• BOS Semiconductors Introduces the Industry's First Chiplet-Based NPU Samples, Expanding Supply to Global Automotive OEMs

Wednesday, September 3, 2025

• TSMC raises prices. Tech giants and consumers will pay for geopolitics
• GPS-Buddy RFID-Tag and ST's LIS2DUX12: Let's talk about the new era of tracking assets and safety monitoring
• Fraunhofer IIS receives EMMY® Award for its JPEG XS high-quality, low-latency video codec
• Chip Interfaces and Soliton Technologies jointly test their I3C Solution at MIPI Plugfest in Poland
• OPENEDGES Technology Expands ISO 26262 ASIL-B Certification to Network-on-Chip IP
• Silicon Creations Named GlobalFoundries Analog Mixed Signal IP Partner of the Year

Tuesday, September 2, 2025

• The 3 Hidden Risks That Can Derail Your IC Design Project! How to Avoid Them?
• Global foundry revenue surged to $41.7 billion in Q2 2025, with TSMC capturing a record 70 percent market share
• IBM and AMD to merge AI accelerators, quantum computers, and HPC development
• TSMC hits record 70% foundry market share, making a synapse singeing $30.24 billion in revenue last quarter alone
• Synopsys Deploys AI-Optimized NVIDIA RTX PRO Servers for Advanced Simulation Workloads
• Securing the future of Terabit Ethernet: introducing the Rambus Multi-Channel Engine MACsec-IP-364

Monday, September 1, 2025

• Rapidus 2HP 2 nm Node to Match TSMC N2 on Logic Density
• CXL 3.1 MXC and the Future of Data Center Memory Architecture
• Rapidus 2HP Reportedly Surpasses Intel 18A Logic Density Impacted by BSPDN, Rivals TSMC
• Ethernet PHY IP Cores - Unmatched Leadership from 1G to 10G
• EXTOLL received GlobalFoundries Award for "Interface IP Partner of the Year"
• AiM Future and Franklin Wireless Sign MOU to Jointly Develop Lightweight AI Model and High-Efficiency 1 TOPS AI SoC Chipset