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Wednesday, November 11, 2020

• Nestwave Recognized for IoT Innovation in 2020 Mobile Breakthrough Awards Program
• Google Partners with SkyWater and Efabless to Enable Open Source Manufacturing of Custom ASICs
• Silvaco Acquires Memory Compiler Technology of Dolphin Design SAS
• Xilinx and Samsung Deliver Industry's First Adaptable Computational Storage Drives
• CXL Consortium Releases Compute Express Link 2.0 Specification
• Lattice Accelerates Development of Low Power FPGA-Based Custom Solutions with Lattice Design Group
• De-RISC first anniversary, a H2020 project which will create the first RISC-V, fully European platform for space
• Efinix Announces Trion Titanium Tapeout at TSMC 16 nm Process Node
• CEVA's High-Performance DSP Solution to Power Renesas' Next-Generation Automotive SoC
• Synopsys Acquires In-chip Monitoring Solutions Leader Moortec
• Vidatronic Achieves up to 10X Speedup Using the Cadence Spectre X Simulator
• Faraday's 22nm Fundamental IP Adopted for Intelligent IoT Devices
• Imagination launches multi-core IMG Series4 NNA - the ultimate AI accelerator delivering industry-disruptive performance for ADAS and autonomous driving
• Time-Sensitive Networking Market is Projected to Reach USD 1 Billion by 2026
• Solving the problem of growing ASIC respins
• Hyundai Embraces Nvidia for Future Fleet AI, IVI Services
• CEA-Leti, Intel Expand Collaboration on 3D Packaging

Tuesday, November 10, 2020

• Sound United Adds MPEG-H 3D Audio format to Denon & Marantz Home Theater Components
• TSMC October 2020 Revenue Report
• Advanced Packaging: Interview with Intel's Ramune Nagisetty

Monday, November 9, 2020

• Korea's Semiconductor Exports to China Increasing
• TSMC to spend US$3.5b on Arizona subsidiary
• Kameleon Security and Xilinx Collaborate on New Cybersecurity Solution for Servers, Cloud Computing and Data Centers
• Avery Design Debuts QEMU Virtual Host to SystemVerilog PCIe VIP HW-SW Co-simulation Solution for Pre-silicon System-level Simulation of NVMe SSD and PCIe Designs
• PLDA Announces CXL 2.0 Support in their XpressLINK Family of CXL Controller IP
• Graphcore leverages multiple Mentor technologies for its massive, second-generation AI platform
• Synopsys Announces Industry's First CXL 2.0 VIP Solution for Breakthrough SoC Performance
• Pinnacle Imaging Systems Announces Denali 3.0 ISP
• Silex Insight delivers state-of-the-art security features to the award-winning Secure Vault technology from Silicon Labs
• CAST Releases MIPI I3C Basic Slave Controller IP Core

Sunday, November 8, 2020

• MosChip Technologies appoints Semiconductor Business Veteran, Swamy Irrinki As "Vice President of Marketing and Business Development" to Oversee and Drive Continued Business Growth
• Cadence Achieves Industry-First ASIL B(D) Compliance Certification for Automotive Radar, Lidar and V2X DSP IP
• UMC Reports Sales for October 2020
• European Processor Initiative: Second year of activities

Thursday, November 5, 2020

• Open-Source RISC-V ISA Offers More
• CEVA SenslinQ Platform Wins 2020 ASPENCORE World Electronics Achievement Award
• Driven by Accelerating Demand for Leading 5G RF Solutions, GLOBALFOUNDRIES and Soitec Announce RF-SOI Wafer Supply Agreement
• Learn the Latest on RISC-V and Vector Processing at All Six Andes Technology Corporation's Presentations at the 2020 RISC-V Summit

Wednesday, November 4, 2020

• Advanced packaging to have 31% CAGR 2019-25
• GUC Monthly Sales Report - Oct 2020
• New Wave Design and Verification Appoints New President
• PLDA XpressSWITCH IP for PCIe technology first ever switch soft IP to pass PCI-SIG's PCIe 4.0 compliance tests
• eMemory NeoFuse IP Qualified on GLOBALFOUNDRIES Advanced High Voltage Platform for OLED Applications
• CEVA, Inc. Announces Third Quarter 2020 Financial Results
• 5G and Interconnect Are Pushing Innovations in Wireless

Tuesday, November 3, 2020

• 300mm Fab Spending to Boom Through 2023 With Two Record Highs, SEMI Reports
• China to Expand Its Semiconductor Industry
• Taiwan's TSMC begins hiring drive for its US foundry
• Virtual electronica: Focus on Technical Trends and Innovations
• How AI Impacts Memory & Interconnect Technology
• Arm has launched a CPU monster that will get Intel and AMD very worried
• Telink TLSR9 Wireless Audio & IoT RISC-V SoC integrates RISC-V DSP/SIMD P-extension
• CEA-Leti today announced a new collaboration with Intel on advanced 3D and packaging technologies for processors to advance chip design.
• Samsung Elec to fully employ 5-nano process to make own phones and others
• 28FDSOI "SoC White Box" SERDES & Controller IPs' are available for immediate licensing
• Arteris IP FlexNoC Interconnect Products Licensed by Bosch for Multiple Automotive Chips
• Imagination's new BXS GPU enables automotive graphics in Texas Instruments processor family
• 55 BCDLite Solution Positions GLOBALFOUNDRIES for Continued Leadership in Audio Amplifiers for Mobile Devices

Monday, November 2, 2020

• Rambus Announces New Stock Repurchase Program
• Cadence Wins Four 2020 TSMC OIP Partner of the Year Awards
• Xylon Announces a New Version of logiVIEW Multiview 3D Video Transformation Engine IP Core
• Movellus Joins GLOBALFOUNDRIES Ecosystem Program, as Partner Providing Application-Optimized PLLs, DLLs, & Comprehensive Clocking Solutions
• Rambus Reports Third Quarter 2020 Financial Results
• NeuLinker Licenses Codasip Bk5 and Studio for Powering Innovative AI and Blockchain Solutions
• Inaccel announces record-breaking speed on facial detection test using an FPGA cluster
• Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs

Sunday, November 1, 2020

• Telink and Andes Announce the TLSR9 SoC with RISC-V Processor
• Silicon Wafer Shipments Slip in Third Quarter 2020 but Strong for Year
• Q3 Global Semiconductor Sales Increase 11 Percent Compared to Q2
• Sondrel announces tape-out of its largest chip design