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Friday, September 4, 2020

• electronica 2020 goes completely digital

Wednesday, September 2, 2020

• Synopsys and Nestwave Collaborate to Develop a Low-Power Geolocation IP Solution for IoT Modems
• Mentor achieves certifications for TSMC's leading-edge 3nm process technology
• SiFive and Barcelona Supercomputing Center Advance Industry Adoption of RISC-V Vector Extension
• Rambus and Micron Extend Patent License Agreement
• SiOx ReRAMs Promise to Accelerate AI Self-Learning
• Kneron Boosts On-Device Edge AI Computing Performance with Cadence Tensilica IP
• Aspinity Raises $5.3 Million Series A Funding to Stop Battery Drain in Always-on Smart Sensing Products
• Blockchain Hardware Accelerator from Silex Insight is now available on AWS Marketplace
• Lattice Expands CrossLink-NX FPGA Family of Best-in-Class Low Power FPGAs for Smart and Embedded Vision Systems
• Chips&Media Announces Making the First License Deal of Upscaling HW IP, c.WAVE120
• Arm announces Cortex-R82: powering the future of computational storage
• BrainChip and VORAGO Technologies Agree to Collaborate through the Akida Early Access Program

Tuesday, September 1, 2020

• SensiML Joins Arm AI Partner Program
• Synopsys Appoints Jeannine Sargent to Board of Directors
• Nokia launching professional 5G training and certification
• How AI Propels Medicine Development
• Secure-IC and NSITEXE form a global partnership to jointly provide cutting-edge security solutions for Cyber-Physical Systems (CPS)
• Imagination announces the first RISC-V computer architecture course

Monday, August 31, 2020

• The Latest Iteration of 5G Standards Nailed Down
• The biggest IoT mistakes businesses make
• Synopsys and Elektrobit Announce Availability of EB tresos Classic AUTOSAR Software for ARC Functional Safety Processor IP
• PUFsecurity Unveils PUFiot, PUF-based Secure Crypto Coprocessor

Sunday, August 30, 2020

• The future of leading-edge chips according to TSMC: 5nm, 4nm, 3nm and beyond
• Kneron's Next-Gen AI SoC Processes Video and Audio at the Edge
• Mobiveil's 25xN RapidIO 4.1 compliant controller IP achives production status
• Broadcom Overtakes Qualcomm for First Place While Nvidia Scores Highest YoY Growth in 2Q20 Revenue Ranking of Global Top Ten IC Design Companies, Says TrendForce
• Flex Logix Announces nnMAX AI Inference IP In Development On GLOBALFOUNDRIES 12LP Platform

Saturday, August 29, 2020

• ProteanTecs, which provides an AI platform to monitor chip reliability, raises $45 million

Thursday, August 27, 2020

• Alibaba's new 16-core CPU will challenge Intel Xeon in datacenters
• TSMC's Super-gap Approach Puts Samsung Electronics on Alert

Wednesday, August 26, 2020

• Chips&Media Publicizes the Collaboration on SiFive's OpenFive, a Custom Silicon Business Unit
• MIPS lands up in China
• proteanTecs Closes $45M Growth Equity Round Led by Koch Disruptive Technologies (KDT)
• Chelsio Adopts Synopsys DesignWare 56G Ethernet PHY IP to Accelerate Development of High-Performance Computing SoC
• China chip imports still at $300bn
• Chips&Media Publicize the Collaboration on SiFive's OpenFive, a Custom Silicon Business Unit.
• Mentor's Questa and Veloce platforms help SimpleMachines dramatically speed development of its first AI processor
• SiliconArts Joins the Khronos Group to Support Standardization of Vulkan Ray Tracing
• Bluespec, Inc. Releases RISC-V Explorer: A Fast, Free, Accurate Way to Evaluate RISC-V

Tuesday, August 25, 2020

• White House announces $1B investment for AI and quantum computing hubs
• Optical Processor Targets to Accelerate Compute for Next-Gen AI
• WISeKey to Establish WISeAI, a Joint Venture with German Artificial Intelligence Leader arago, Blending AI, IoT and Cybersecurity into a Trusted European Platform
• Samsung Display Demonstrates Most Advanced Display Hole for Smartphone Cameras
• Nvidia Data Center Growth: Could Buying Arm Be an Ideal Match?
• Cadence IC Packaging Reference Flow Certified for the Latest TSMC Advanced Packaging Solutions

Monday, August 24, 2020

• CXLâ„¢ Consortium and JEDEC® Sign MOU Agreement to Advance DRAM and Persistent Memory Technology
• Automotive Software Platforms: Current Status
• Huawei is hurrying to build a wafer fab
• GigaDevice launches the New GD32E5 Series of MCU's, marking a new milestone for high-performance computing based on the Arm Cortex-M33 core.
• Cadence Announces Availability of UltraLink D2D PHY IP on TSMC N7, N6 and N5 Processes
• Marvell and TSMC Collaborate to Deliver Industry's Most Advanced Data Infrastructure Portfolio on 5nm Technology
• Synopsys Collaborates with TSMC to Accelerate 3nm Innovation, Enabling Next-Generation SoC Design
• Analog Bits to Present Papers on Wafer-Scale Sensors and PCIe Clock Systems at TSMC 2020 Open Innovation Platform Ecosystem Forums
• TSMC Plots the Process Course to Its Next "Generational Node"
• TSMC Showcases Leading Technologies at Online Technology Symposium and OIP Ecosystem Forum
• Synopsys and TSMC Accelerate 2.5D/3DIC Designs with Chip-on-Wafer-on-Substrate and Integrated Fan-Out Certified Design Flows

Sunday, August 23, 2020

• Arm Flexible Access one year later: Accelerating innovation for more than 60 partners and counting
• Foundry Revenue Projected to Grow by 14% YoY in 3Q20
• Visit Moortec at the Virtual TSMC Technology Symposium & Open Innovation Platform Ecosystem Forum
• TrendForce Analyzes Impacts of Expanded U.S. Sanctions Against Huawei on Five Major Tech Industries
• Socionext and Osaka University Develop New Deep Learning Method for Object Detection in Low-Light Conditions
• Silicon Creations' Achieves ISO 9001 Certification for World-Class Silicon IP Development Process
• North American Semiconductor Equipment Industry Posts July 2020 Billings
• Sofics releases Analog I/O's and ESD clamps for TSMC N5 process
• Dolphin Design Releases its First Development Platform on TSMC 22ULL Process for Smart Home Applications
• Foundry Revenue Projected to Grow by 14% YoY in 3Q20 as Downstream Clients Exhibit Strong Demand, Says TrendForce