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Friday, July 4, 2025

• Tech Note: Use this Flexible and Efficient AC’97 IP Core for Simple Audio Interfaces and Legacy System Upgrades
• Infineon to Start 300 mm GaN Wafer Production as TSMC Exits Market
• South Korean chipmakers accelerate facility investments amid booming AI demand
• Qt to buy IAR for $230m
• Synopsys, Cadence, and Siemens resume EDA supply to China
• Are open-source RISC-V CPUs a threat to ARM Holdings' business?
• TSMC to exit gallium nitride semiconductor business in two years
• Samsung delays 1.4nm node, doubles down on 2nm process enhancement

Thursday, July 3, 2025

• A statement from Tony Hemmelgarn
• Renesas unveils RA8P1 MCUs with Cortex-M85, NPU
• Intel Shifts foundry focuses to 14A node; UBS keeps Neutral rating.

Wednesday, July 2, 2025

• How GF FDX™ and FinFET solutions are powering the next generation of Wi-Fi
• Europe prepares its Quantum Act
• Scaling for Success: How Weebit is Preparing for its Next Phase of Growth
• Nordic Semiconductor and Sercomm Corporation partner on cellular IoT module designed for applications demanding reliable, power-saving performance
• MIPI Alliance Recognizes Members for Contributions and Leadership at 12th Annual Awards Ceremony
• Three Pillars for Semiconductor Success in the Chiplet Economy
• Arteris Expands Multi-Die Network-on-Chip Design IP and Software
• Intel Reportedly Weighs Dropping 18A, Bets on 14A to Attract Clients and Challenge TSMC
• Consumer-Tech Brand, Nothing, Taps Ceva's RealSpace Software to Bring Immersive Spatial Audio to Headphones and Earbuds
• Tenstorrent Acquires Blue Cheetah Analog Design

Tuesday, July 1, 2025

• Wavetek Deploys Silvaco’s Victory TCAD™ to Drive Innovation in GaN-Based Connectivity Solutions
• Quantum Computers Just Reached the Holy Grail - No Assumptions, No Limits
• What Tech Innovations Did Arm Deliver in June 2025?
• Siemens completes acquisition of Dotmatics
• How AI Is Proving Useful in New Materials Discovery for the 2nm Era
• Renesas Strengthens Power Leadership with New GaN FETs for High-Density Power Conversion in AI Data Centers, Industrial and Charging Systems
• Codasip board initiates an expedited process to sell the company
• Chips&Media's New APV CODEC Delivers Extreme Visual Quality to the Android Industry

Monday, June 30, 2025

• Synopsys receives Frost & Sullivan's Technology Innovation Leadership Award
• Keysight and Synopsys employ AI for RF design migration
• Synopsys and Ansys Provide Update Regarding Expected Timing of Acquisition Close
• Vayavya Labs Accelerating Agile Automotive Development for OEMs and Tier-1s with Virtual ECUs
• Ethernet IP Core for Next-Gen Automotive SoCs: Complementing CAN, LIN, and FlexRay with Scalable Connectivity

Saturday, June 28, 2025

• Synopsys Reinvents Semiconductor Design: AI-Driven EDA Tools Lead the Charge in Next-Gen Chip Innovation

Friday, June 27, 2025

• The 10 Hottest Semiconductor Startups Of 2025 (So Far)
• Arm: Chiplets Can't Deliver on TCO Without an Ecosystem
• Intel begins "major" programme of layoffs and closes automotive unit
• Photonics, Power, and Packaging at the 6G Research Frontier
• Level 2+ Could Be a Long-Term Middle Ground
• Ceva Brings Precise, Spatial Control to Smart TV, IoT Interfaces
• CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
• FH (Frequency Hopping) - OFDM Modem Available For Immediate Implementation From Global IP Core

Thursday, June 26, 2025

• Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
• AI Chip Leader Sets Up In Base; Data Center, IoT, Automotive Among Growth Drivers
• Silvaco, Fraunhofer ISIT partner to advance GaN technology
• ELENA project pioneers Europe's LNOI PIC supply chain
• Imec-Backed Eyeo Splits Light into Colors
• VTT joins PIXEurope, the advanced European photonics pilot line
• Arteris Wins "AI Engineering Innovation Award" at the 2025 AI Breakthrough Awards
• VeriSilicon Expands DSP Portfolio with Silicon-Proven ZSP5000 Vision Core Series for Edge Intelligence
• China to have 30% of foundry capacity by 2030
• eMemory's NeoFuse OTP Qualifies on TSMC's N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips

Wednesday, June 25, 2025

• How Chip Startups Are Changing the Way Chips Are Designed
• IPValue Affiliate Licenses Samsung to Patent Portfolio Acquired from Intel
• U.K. Commits £670M to Accelerate Quantum Computing Development
• Semiconductor foundry landscape to transform by 2030
• Cadence appoints CFO
• Xiphera and Austin Electric Partner to Strengthen Hardware-Based Security in South Korea
• Maven Silicon is now an Approved Training Partner of Altera's Solution Acceleration Partner (ASAP) Program!
• Samsung Reportedly Prioritizes 2nm/4nm Improvements, with 1.4nm Unlikely Before 2028-29
• Nordic Semiconductor acquires Memfault, launches the first complete chip-to-cloud platform for lifecycle management of connected products
• Sofics Delivers Remarkable PPA & R Performance Near Physical Limits on TSMC 2nm Technology
• BrainChip and HaiLa Partner to Demonstrate Ultra-Low Power Edge AI Connectivity for IoT Sensor Applications
• Siemens streamlines design and analysis of complex, heterogeneously integrated 3D ICs

Tuesday, June 24, 2025

• TU/e Launches Research Hub for Semiconductors and Photonics
• RISC-V and AI: Innatera's PULSAR Shakes Up the Edge
• AMD will launch PCIe 6.0 devices next year but consumers will have to wait almost half a decade to get it - here's why
• Global Semiconductor Foundry 2.0 Market’s Q1 2025 Revenue Jumps 13% YoY Driven by AI Chip Demand
• Samsung Foundry Postpones 1.4nm Trial Line Investment, Focuses on 2nm
• LASER 2025: UK Photonics industry surges to £18.5 billion turnover in 2024
• New EDA tools arrive for chiplet integration, package verification
• Ceva Launches MotionEngine™ Hex: Bringing Precise, Touch-Free, Spatial Control to Smart TV, Gaming, and IoT Interfaces
• Creonic's DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard
• Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC's 22nm Platform

Monday, June 23, 2025

• Ausdia Solves Critical Design Flow Gap with OneSource Constraint Translation at DAC 2025
• Europe's semiconductor leaders are racing to meet energy demands
• SignatureIP Unveils Industry-Leading CXL 3.2 Solution for High-Performance Computing
• Continental to Create an Advanced Electronics & Semiconductor Solutions Organization
• 2.5D/3D chip technology to advance semiconductor packaging
• Mirabilis Design Signs OEM Agreement with Cadence to Deliver VisualSim for System-Level Modeling and Performance Optimization
• BOS Joins VESA and UCIe to Advance Global Standards in Display and Chiplet Technology
• Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets
• Siemens turbocharges semiconductor and PCB design portfolio with generative and agentic AI
• Rapidus announces collaboration with Siemens for 2nm semiconductor design
• Certified Automotive Ethernet, CAN XL, and LIN IP Cores — Proven, Qualified, and Ready for Seamless Integration
• True Circuits Announces New and Improved Low-jitter Digital Ultra+ PLL that Offers Exceptional Performance, Features and Ease of Use