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Thursday, April 25, 2024

• Automotive Cybersecurity: A Review of 2023
• TSMC plans 1.6nm process for 2026
• Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
• Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%

Wednesday, April 24, 2024

• TSMC unveils 1.6nm process technology with backside power delivery, rivals Intel's competing design
• TSMC unveils 1.6nm process technology with backside power delivery, rivals Intel's competing design
• M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
• Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
• Numem at the Design & Reuse IP SoC Silicon Valley 2024
• TSMC Celebrates 30th North America Technology Symposium with Innovations Powering AI with Silicon Leadership
• Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
• Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development

Tuesday, April 23, 2024

• Industry's First General-Purpose 32-bit RISC-V MCU Core Expands Design Freedom
• Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
• Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
• Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
• Leveraging Cryogenics and Photonics for Quantum Computing
• Credo at TSMC 2024 North America Technology Symposium
• Rambus Advances AI 2.0 with GDDR7 Memory Controller IP

Monday, April 22, 2024

• Efabless Announces the Launch of the Tiny ML on Tiny Tapeout Contest
• Siemens and Mercedes-Benz Transform Future of Sustainable Factory Planning with Digital Energy Twin
• Fundamental inventions enable the best ppa and most portable eFPGA/DSP/SDR/AI IP for adaptable SOCs
• Cadence Reports First Quarter 2024 Financial Results
• RAAAM Memory Technologies Closes $4M Seed Round to Commercialize Super Cost Effective On-Chip Memory Solutions
• Faraday Reports First Quarter 2024 Results
• Alphawave Semi Audited Results for the Year Ended 31 December 2023
• Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
• Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
• Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium

Sunday, April 21, 2024

• Infineon's Global Forum: Driving Change With WBG Technologies for a Sustainable Future
• Siemens Xcelerator: Scaling roll-out of generative AI with Siemens Industrial Copilot
• Controversial former Arm China CEO founds RISC-V chip startup
• Palladium emulation: Nvidia's Jensen Huang is a fan
• How Close Are We to Commercial Quantum Computers?
• T2M-IP Unveils Revolutionary MIPI D-PHY & DSI Controller IP Cores with speed 2.5Gbps/lane, Redefining High-Speed Data Transfer and Display Interfaces
• Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC

Thursday, April 18, 2024

• Fraunhofer IIS Opens Laboratory in Space
• Brisbane Silicon publishes DPTx 1.4 IP Core
• TSMC Reports First Quarter EPS of NT$8.70
• Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
• Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
• DVB-S2X Wideband LDPC/ BCH Decoder IP Core Available For Integration From Global IP Core
• GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers

Wednesday, April 17, 2024

• Cadence Collaborates with MemVerge to Increase Resiliency and Cost-Optimization of Long-Running High-Memory EDA Jobs on AWS Spot Instances
• M31 Successfully Validates 5nm IP Solution to Empower Global AI Applications
• Dolphin Design expands GoAsic partnership to enhance the semiconductor Industry's Supply Chain
• Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
• Cadence Announces Most Comprehensive True Hybrid Cloud Solution to Provide Seamless Data Access and Management
• Demonstration of Weebit ReRAM on GF 22FDX® Wafers at EW24
• Faraday Partners with Arm to Innovate AI-driven Vehicle ASICs

Tuesday, April 16, 2024

• Infineon provides FOXESS with power semiconductors to improve efficiency and power density of energy storage applications
• STMicroelectronics opens up the FD-SOI era for MCU
• Samsung Develops Industry's Fastest 10.7Gbps LPDDR5X DRAM, Optimized for AI Applications
• Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
• JEDEC Updates JESD79-5C DDR5 SDRAM Standard: Elevating Performance and Security for Next-Gen Technologies
• Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
• Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass-Produced
• Silvaco Announces Expanded Partnership with Micron Technology
• U.S. Subsidy for TSMC Has AI Chips, Tech Leadership in Sight
• Rivos Raises More Than $250M Targeting Data Analytics and Generative AI Markets

Monday, April 15, 2024

• Emotors adopts Siemens' Simcenter solutions for NVH testing of next-generation automotive e-drives
• TSMC Reports Solid Earnings Boost Amid Surging AI Demand
• STMicroelectronics Publishes 2024 Sustainability Report
• Challenges in designing automotive radar systems
• Arm accelerates Edge AI with Ethos-U NPU and IoT reference design platform
• ITRI launches AIoT certification center with Arm
• IP block covers Wi-Fi 6, Bluetooth 5.4 dual mode and IEEE 802.15.4 for IoT chips
• Movellus Extends Droop Management Leadership with Aeonic Generateâ„¢ AWM3
• Fraunhofer IIS offers JPEG XS plugin for NVIDIA´s Holoscan for Media Architecture
• CMC Microsystems and AIoT Canada Sign Memorandum of Understanding to support IoT and semiconductor ecosystem growth in Canada
• Movellus Extends Droop Management Leadership with Aeonic Generate™ AWM3
• Fraunhofer IIS offers JPEG XS plugin for NVIDIAs Holoscan for Media Architecture
• OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance