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1867 IP
901
1.0
GLOBALFOUNDRIES 22nm FDSOI USB3.0 PHY
...
902
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V1.0/V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v1.0 and D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...
903
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of 1-Clock and 4-Data lanes. It can support Slav...
904
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Master V2.1/V3.0
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v2.1 and D-PHY v3.0”, which consists of Bi-directional 1-Clock and 4-Data lanes. It c...
905
1.0
GLOBALFOUNDRIES 22nm FDX MIPI CDPHY Slave V1.0/V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for C-PHY v1.0 and D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Slav...
906
1.0
GLOBALFOUNDRIES 22nm FDX MIPI DPHY Master V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Master side. Each...
907
1.0
GLOBALFOUNDRIES 22nm FDX MIPI DPHY Slave V1.2
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Slave side. Each l...
908
1.0
GLOBALFOUNDRIES 28nm USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog fro...
909
1.0
GLOBALFOUNDRIES 55nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
910
1.0
Ultra-low cost and high performance crystal-less USB2.0 device PHY
...
911
1.0
SMIC 0.11um USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
912
1.0
SMIC 0.13um 1.2V/3.3V PCI I/O Cells Library
VeriSilicon SMIC 0.13um 1.2V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation...
913
1.0
SMIC 0.13um USB 1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...
914
1.0
SMIC 0.13um USB 1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...
915
1.0
SMIC 0.18um PCI I/O Cells DUP Library
VeriSilicon SMIC 0.18um 1.8V/3.3V PCI I/O Cells Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
916
1.0
SMIC 0.18um PCI I/O Cells Library
VeriSilicon SMIC 0.18um 1.8V/3.3V PCI I/O Cells Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
917
1.0
SMIC 0.18um PCI-X IO
The PCI-X transceiver is a IP version of PCI-X I/O pads, which is fully compatible with PCI-X R1.0 specification....
918
1.0
SMIC 0.25um 2.5V/3.3V PCI I/O Cells Library
VeriSilicon SMIC 0.25um 2.5V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation...
919
1.0
SMIC 110nm MIPI DPHY
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...
920
1.0
SMIC 28nm USB3.0 Dual Role PHY/Type-C
The USB3.0 Type-C PHY IP is designed to the USB 3.0, USB2.0 Specification and the USB Type-CTM USB Cable and Connector Specification Revision 1.1....
921
1.0
SMIC 55nm LL MIPI DPHY
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1”, which consists of Bi-directional 1-Clock and 4-Data lanes. It can support both...
922
1.0
SMIC 55nm LL USB2.0 PHY
...
923
1.0
SMIC 55nm sub-LVDS Receiver
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....
924
1.0
SMIC 55nm sub-LVDS Receiver
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....
925
1.0
SMIC 65nm USB2.0 Dual Role PHY
The USB 2.0 dual role PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB anal...
926
1.0
Normal USB1.1 device PHY
...
927
1.0
Normal USB1.1 device PHY
...
928
1.0
Normal USB1.1 device PHY
...
929
1.0
DP/eDP1.4/1.2 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. ...
930
1.0
DP/eDP1.4/1.2 TX PHY&controller
Innosilicon eDP TX PHY is designed to transmit video, audio, and auxiliary data from a system host device to a display device for display applications...
931
1.0
DP1.1 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. ...
932
1.0
DP1.2 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. ...
933
1.0
DP1.2 Transmitter PHY
Innosilicon DP TX IP is designed to transmit video, audio and auxiliary data from system host device to a display device for display applications. In...
934
1.0
DP1.2 Transmitter PHY_40nm
Innosilicon DP TX IP is designed to transmit video, audio and auxiliary data from system host device to a display device for display applications. In...
935
1.0
DP1.4 Receiver Controller
This document describes the low power Innosilicon DP 1.4 Receiver controller, which is fully compliant with DP 1.4 specification and eDP 1.4 standard....
936
1.0
DP1.4 TX PHY
Innosilicon eDP TX PHY is designed to transmit video, audio, and auxiliary data from a system host device to a display device for display applications...
937
1.0
Crystal-free USB1.1 device PHY
...
938
1.0
Crystal-less USB 1.1 Transceiver PHY
...
939
1.0
Crystal-less USB1.1 device PHY
...
940
1.0
Crystal-less USB1.1 device PHY total solution
...
941
1.0
Crystal-less USB1.1 device PHY total solution(XRG013EFDUSB2PY_DNXC50A)
Ultral-small size: 0.033mm2; High performance, low EMI TX driver design...
942
1.0
Crystal-less USB1.1 device PHY(No analog PADs)
...
943
1.0
Crystal-less USB2.0 device PHY
...
944
1.0
Crystal-less USB2.0 device PHY
...
945
1.0
Crystal-less USB2.0 device PHY
...
946
1.0
Crystal-less USB2.0 device PHY
...
947
1.0
crystalless USB1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver designed in standard logic to interface the physical layer of Universal Serial Bus. It receives dat...
948
1.0
RSA public key cryptography with APB interface
The standard RSA module is available as an APB peripheral, where it seamlessly integrates with EnSilica's cryptography library. The peripheral can be...
949
1.0
USB 1.1 PHY
The USB1.1 PHY is an IP version of USB transceiver. It receives data with DP and DM and transfers data to USB1.1 core with RCV, VM and VP. It is desig...
950
1.0
USB 1.1 PHY
The USB11PHY is an IP version of USB transceiver. It receives data with DP and DM and transfers data to USB11 core with RCV, VM and VP. It is designed...