Design & Reuse
1866 IP
1001
1.0
Multi-PHY Receiver Link Controller
CD12842M8LRM3BM4AIP312P5 is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system. This LINK IP is a soft macr...
1002
1.0
Super-Speed Plus USB 3.2 Hub Controller
USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...
1003
1.0
eUSB2 PHY
The industry’s most advanced process nodes do not support 3.3V signaling and 5V tolerance as required by the USB 2.0 specification. 3.3V signaling was...
1004
1.0
LVDS RX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
1005
1.0
LVDS TX Combo TTL PHY
Innosilicon LVDS implements LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains four 7-bit parallel-load serial-out shift registers, a 7X clock...
1006
1.0
LVDS TX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
1007
1.0
Type-C PHY
Innosilicon Type-C IP is composed of the physical layer and the PHY logic. The physical layer contains 4 data channels, an AUX channel and bias circui...
1008
0.6098
MIPI D-PHY TRx 5nm
The MIPI D-PHY IP is a hardmacro PHY for CSI RX or DSI TX. IO pads and ESD structures are included. Extensive built-in self test features such as loop...
1009
0.3729
I2C Controller & PHY
DTI I2C Controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C ...
1010
0.3729
PCI/PCIX Interface 1.8V Oxide Device- TSMC 22nm 22ULP,ULL
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1011
0.3729
PCI/PCIX Interface 1.8V Oxide Device - TSMC 28nm 28HP, 28LP, 28ULP, 28HPL, 28HPC, 28HPC+, 28HPM
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1012
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 28nm 28HP (CLN28HP)
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
1013
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 40nm 40G (CLN40G)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1014
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 40nm 40LP (CLN40lp)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
1015
0.3729
Dolphin I2S Controller & PHY
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices. The controller is compliant with NXP Inter-IC Sound Bus Specif...
1016
0.3729
Dolphin I3C Controller & PHY
DTI I3C Controller provides the logic consistent with NXP I3C specification to support the communication of low-speed integrated circuits through I3C ...
1017
0.118
V-by-One Receiver
Analog part of 600Mbps to 4Gbps 4-lane V-By-One receiver with embedded CDR circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process....
1018
0.118
V-by-one(VBO) high speed receiver(RX) (includes PMA, PCS, and controller).
V-by-one(VBO) high speed receiver(RX) (includes PMA, PCS, and controller)....
1019
0.118
V-by-one(VBO) high speed transmitter(TX) (includes PMA, PCS, and controller).
V-by-one(VBO) high speed transmitter(TX) (includes PMA, PCS, and controller)....
1020
0.118
16Gbps multi-protocol programmable SerDes PHY in UMC 28HPC+
Faraday 16Gbps multi-protocol programmable SerDes PHY IP in UMC 28HPC+ process is designed with a system-level approach to provide optimization of pow...
1021
0.118
28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process
28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process...
1022
0.118
28nm HPC USB3.1 gen2 PHY(10Gbps)
28nm HPC USB3.1 gen2 PHY(10Gbps)...
1023
0.118
28nm HPC x4 lane 10 Gbps SERDES
28nm HPC x4 lane 10 Gbps SERDES...
1024
0.118
28nm HPC+ USB3.1 gen2 PHY(10Gbps)
28nm HPC+ USB3.1 gen2 PHY(10Gbps)...
1025
0.118
SATA Controller IP, SATA Gen-3 Host, Soft IP
SATA AHCI host controller with PVCI/AHB/AXI interface....
1026
0.118
SATA Controller IP, SATA Gen-3, Soft IP
SATA Device Controller....
1027
0.118
SATA II PHY IP, Gen-2, 1 - port, UMC 0.18um G2 process
1.5G/3.0Gbps 1 port Serial ATA PHY and ESATA, UMC 0.18um GII Logic process....
1028
0.118
SATA II PHY IP, Gen-2, UMC 0.11um HS/AE process
3G/1.5G Serial ATA PHY, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process....
1029
0.118
SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Serial ATA (SATA) physical layer that provides a complete range of host and device functions, UMC 0.13um HS/FSG Logic process....
1030
0.118
SATA II PHY IP, Gen-2, UMC 0.13um HS/FSG process
Over sampling 1 port 3G/1.5G SATA PHY, UMC 0.13um HS+LL/FSG Logic process....
1031
0.118
SATA II PHY IP, Gen-2, UMC 90nm SP process
Serial ATA I II PHY, UMC 90nm SP/RVT Low-K Logic process....
1032
0.118
SATA II PHY IP, Support SATA Gen1 1.5Gb/s and SATA Gen2 3.0Gb/s, UMC 0.18um Logic process
Single channel serial ATA PHY layer compliant with SATA spec. of 3.0Gbps....
1033
0.118
SATA II PHY IP, UMC 55nm SP process
Serial ATA I, II PHY, UMC 55nm SP/RVT Low-K Logic process....
1034
0.118
SATA III PHY IP, Gen-3, UMC 0.11um HS/FSG process
6G/3G/1.5G Serial ATA PHY, UMC 0.11um HS/FSG Logic process....
1035
0.118
SATA III PHY IP, Gen-3, UMC 55nm SP process
Serial ATA I, II, III PHY, UMC 55nm SP/RVT Low-K Logic process....
1036
0.118
PCI Express Gen2 PHY IP, PCIe Gen-2, 1 Lanes, UMC 55nm SP process
PCIE Gen.II, UMC 55nm SP/RVT Low-K Logic process....
1037
0.118
PCI Express Gen2 PHY IP, PCIe Gen-2, 1 Lanes, UMC 90nm SP process
PCI-Express II PHY, UMC 90nm SP/RVT Low-K process....
1038
0.118
PCI Express Gen2 PHY IP, PCIe Gen-2, 4 Lanes, UMC 90nm SP process
4x lane PCI Express Gen II PHY, UMC 90nm SP/RVT Low-K Logic process....
1039
0.118
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.13um HS/FSG process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY with Low Power feature, UMC 0.13um HS/FSG Logic process....
1040
0.118
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process....
1041
0.118
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process....
1042
0.118
PCI-X Controller IP, PCIX 1.0b, Soft IP
PCI-X 1.0b device/host bridge controller....
1043
0.118
PCIe Controller IP, PCIe Gen-2 with the AHB interface, x1 Lanes, Soft IP
PCI Express Gen 2 Endpoint Controller. Support single-function, virtual channel and single lane....
1044
0.118
PCIe Controller IP, PCIe Gen-2 with the AXI interface, x4 Lanes, Soft IP
PCIe Gen2 x4 Lane Endpoint Controller....
1045
0.118
PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process.
PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process....
1046
0.118
PCIe Gen4 x8 Lane Endpoint Controller
PCIe Gen4 x8 Lane Endpoint Controller...
1047
0.118
ID PAD of OTG USB2.0 ; XIP 55LP/RVT LowK Logic Process
ID PAD of OTG USB2.0 ; XIP 55LP/RVT LowK Logic Process...
1048
0.118
Receive the high speed serial signal, transfer it to parallel data and unpack the symbol packet, direct video stream output finally.
Receive the high speed serial signal, transfer it to parallel data and unpack the symbol packet, direct video stream output finally....
1049
0.118
AHB system Peripheral IP, AHB - to - AHB Bridge, Soft IP
AHB to AHB bridge....
1050
0.118
AHB system Peripheral IP, AHB - to - APB Bridge, Soft IP
The IP is APB Bridge between AHB bus and APB bus....