Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC Days 2020
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
IP-SoC 2020
Subscribe to D&R SoC News Alert
English
Mandarin
Register
Login
Menu
Home
Search Product
News
D&R Events
Subscribe to D&R SoC News Alert
Sign In
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Asic Design Center
IP-SoC Days
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC Days 2020
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
IP-SoC 2020
Browse Wireline Communication IP
ATM / Utopia (4)
CEI (14)
Cell / Packet (6)
Error Correction/Detection (145)
Ethernet (131)
Fibre Channel (1)
HDLC (6)
Interleaver/Deinterleaver (1)
Modulation/Demodulation (17)
Optical/Telecom (50)
Other (38)
CEI-112G-MR/LR (8)
CEI-112G-VSR (4)
CEI-56G-MR/LR (1)
CEI-6G-SR/LR (1)
Concatenated (9)
Forward Error Correction (69)
LDPC (20)
Reed-Solomon (18)
Turbocode (6)
Viterbi (7)
Other (16)
Fibre Channel 16G (1)
Quadrature Amplitude Modulation (2)
Other (15)
EPON (1)
OTN (28)
PDH (3)
SONET / SDH (6)
SPI (12)
12 IP
1
5.0
SPI Serial Peripheral Interface Master/Slave
The CC-SPI-AXI is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller. The SPI core can be efficiently implemen...
2
2.0
Serial protocol Interface Slave
The MSPIS IP implements a synchronous a single-chip SPI Slave IP capable of high speed serial data transfer with one SPI master. The MSPIS IP can be ...
3
2.0
SPI Master - EEPROM Controller
The MSPIM IP implements a synchronous a single-chip SPI Master IP capable of high speed serial data transfer with up to 8 SPI slave. The MSPIM IP can...
4
1.0
SPI Master Serial Interface Controller
Master serial interface compatible with the popular SPI standard. Features a simple command interface and permits multiple SPI slaves to be controll...
5
1.0
SPI Slave Serial Interface Controller
Slave serial interface compatible with the popular SPI standard. Permits an SPI Master to communicate with your FPGA, CPLD or ASIC device. The contr...
6
0.3729
A bridge to convert the slave SPI interface to the master I2C interface and vice versa
The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....
7
0.3729
A bridge to convert the slave SPI interface to the master UART interface and vice versa
The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....
8
0.0
Serial Peripheral Interface – Master/Slave with Octal, Quad, Dual and Single SPI Bus support
The SPI IP is a revolutionary octal SPI designed to offer the fastest operations available for any serial SPI memory. It is flexible enough to interfa...
9
0.0
QSPI FLASH Controller – XIP functionality (SINGLE, DUAL and QUAD SPI Bus Controller with Double Data Rate support)
The SPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and phase of serial cloc...
10
0.0
Express Serial Peripheral Interface IP Core
eSPI controller is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of standard eSPI specification. Through its eSP...
11
0.0
FSPI Controller – XIP functionality (SINGLE, DUAL, QUAD and OCTAL SPI Bus Controller with Double Data Rate support)
The FSPI is a fully configurable SINGLE, DUAL, QUAD and OCTAL SPI master/slave device, which allows user to configure polarity and phase of serial clo...
12
0.0
Octal SPI Controller – XIP functionality (SINGLE, DUAL, QUAD and OCTAL SPI Bus Controller with Double Data Rate support) and DMA Support
Octal SPI master is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of Macronix (MX66LM1G45G) Octal SPI REV.1.0 sp...